1. Chun-Yu Liao, Kuo-Yu Hsiang, Zhao-Feng Lou, Chen-Ying Lin, Yi-Ju Tseng, Han-Chen Tseng, Zhi-Xian Li, Wei-Chang Ray, Fu-Sheng Chang, Chun-Chieh Wang, Tzu-Chiang Chen*, Chih-Sheng Chang*, and Min Hung Lee*, “Multipeak Coercive Electric-field-based Multilevel Cell Nonvolatile Memory with Antiferroelectric-Ferroelectric Field-Effect Transistors (FETs), ” accepted by IEEE Trans. on Ultrasonics, Ferroelectrics, and Frequency Control.
  2. C.-M. Yen, S.-Y. Chang, K.-C. Chen, Y.-J. Feng, L.-H. Chen, B.-Z. Liao, M.-H. Lee, S.-C. Chen, and M.-H. Liao*, “The demonstration of high-quality Carbon Nano-Tubes as Through Silicon Vias (TSVs) for Three Dimensional Connection Stacking and Power-Via Technology, ” IEEE Trans. on Electron Device, vol. 69, no. 3, pp. 1600-1603, 2022.
  3. Jun-Dao Luo*, Yu-Ying Lai, Kuo-Yu Hsiang, Chia-Feng Wu, Hao-Tung Chung , Wei-Shuo Li, Chun-Yu Liao, Pin-Guang Chen, Kuan-Neng Chen, Min-Hung Lee*, and Huang-Chung Cheng, “Atomic Layer Deposition Plasma-Based Undoped-HfO2 Ferroelectric FETs for Non-Volatile Memory, ” IEEE Electron Device Letter, vol. 42, no. 8, pp. 1152-1155, 2021. DOI: 10.1109/LED.2021.3092787
  4. Shu-Jui Chang, Chih-Yu Teng, Yi-Jan Lin, Tsung-Mu Wu, Min Hung Lee, Bi-Hsuan Lin, Mau-Tsu Tang, Tai-Sing Wu, Chenming Hu, Ethan. Ying-Tsan Tang*, Yuan-Chieh Tseng*, “Visualizing Ferroelectric Uniformity of Hf1-xZrxO2 Films Using X-ray Mapping, ” ACS Applied Materials & Interfaces, 2021. DOT: https://doi.org/10.1021/acsami.1c08265
  5. Kuo-Yu Hsiang, Chun-Yu Liao, Jer-Fu Wang, Zhao-Feng Lou, Chen-Ying Lin, Shih-Hung Chiang, Chee-Wee Liu, Tuo-Hung Hou, and Min-Hung Lee*, “Unipolar Parity of Ferroelectric-Antiferroelectric Characterized by Junction Current in Crystalline Phase Hf1-xZrxO2 Diodes, ” accepted by MDPI Nanomaterials, 2021.
  6. Jun-Dao Luo*, Yu-Ying Lai, Kuo-Yu Hsiang, Chia-Feng Wu, Yun-Tien Yeh, Hao-Tung Chung, Yi-Shao Li, Kai-Chi Chuang, Wei-Shuo Li, Chun-Yu Liao, Pin-Guang Chen, Kuan-Neng Chen, Min-Hung Lee*, and Huang-Chung Cheng, “Ferroelectric Undoped-HfOx Capacitor with Symmetric Synaptic for Neural Network Accelerator, ” IEEE Trans. on Electron Device, vol. 68, no. 3, pp. 1374-1377, 2021.
  7. K.-Y. Hsiang, C.-Y. Liao, J.-H. Liu, J.-F. Wang, S.-H. Chiang, S.-H. Chang, F.-C. Hsieh, H. Liang, C.-Y. Lin, Z.-F. Lou, T.-H. Hou, C. W. Liu, and M. H. Lee*, “Bilayer-based Antiferroelectric HfZrO2 Tunneling Junction with High Tunneling Electroresistance and Multilevel Nonvolatile Memory, ” IEEE Electron Device Letter, vol. 42, no. 10, pp. 1464-1467, 2021. DOI: 10.1109/LED.2021.3107940
  8. C.-Y. Liao, K.-Y. Siang, S.-H. Chang, S.-H. Chiang, F.-C. Hsieh, J.-H. Liu, H. Liang, Z.-F. Luo, C.-Y. Lin, L.-Y. Chen, V. P.-H. Hu and M. H. Lee*, “Identical Pulse Programming Based Ultra-Thin 5 nm HfZrO2 Ferroelectric Field Effect Transistors with High Conductance Ratio and Linearity Potentiation Learning Trajectory, ” ECS Journal of Solid State Science and Technology, vol. 10, 065015, 2021. DOI: https://doi.org/10.1149/2162-8777/ac08d8
  9. K.‑T. Chen, K.‑Y. Hsiang, C.‑Y. Liao, S.‑H. Chang, F.‑C. Hsieh, J.‑H. Liu, S.‑H. Chiang, H. Liang, S. T. Chang*, M. H. Lee*, “Capacitance matching by optimizing the geometry of a ferroelectric HfO2‑based gate for voltage amplification, ” Journal of Computational Electronics, 2021.
  10. C.-Y. Liao, K.-Y. Hsiang, F.-C. Hsieh, S.-H. Chiang, S.-H. Chang, J.-H. Liu, C.-F. Lou, C.-Y. Lin, T.-C. Chen*, C.-S. Chang*, and M. H. Lee*, “Multibit Ferroelectric FET Based on Nonidentical Double HfZrO2 for High-Density Nonvolatile Memory, ” IEEE Electron Device Letter, vol. 42, no. 4, pp. 617-620, 2021.
  11. M.-H. Liao*, K.-C. Huang, W.-J. Su, S.-C. Chen, and M.-H. Lee, “The Demonstration of 3-D Bi2.0Te2.7Se0.3/Bi0.4Te3.0Sb1.6 Thermoelectric Devices by Ionized Sputter System, ” IEEE Trans. on Electron Device, vol. 67, no. 1, pp. 406-408, 2020. DOI: 10.1109/TED.2019.2950981
  12. M.-H. Liao*, P.-Y. Lu, W.-J. Su , S.-C. Chen, H.-T. Hung, C.-R. Kao, W.-C. Pu, C.-C. A. Chen, and M.-H. Lee, “The Demonstration of Carbon Nanotubes (CNTs) as Flip-Chip Connections in 3-D Integrated Circuits With an Ultralow Connection Resistance, ” IEEE Trans. on Electron Device, vol. 67, no. pp. 2205-2207, 2020.
  13. K.-Y. Hsiang, C.-Y. Liao, K.-T. Chen, Y.-Y. Lin, C.-Y. Chueh, C. Chang, Y.-J. Tseng, Y.-J. Yang, S. T. Chang, M.-H. Liao, T.-H. Hou, C.-H. Wu, C.-C. Ho, J.-P. Chiu, C.-S. Chang, and M. H. Lee*, “Ferroelectric HfZrO2 with Electrode Engineering and Stimulation Schemes as Symmetric Analog Synaptic Weight Element for Deep Neural Network Training , ” IEEE Transactions on Electron Devices, vol. 67, no. 10, pp. 4201-4207, 2020.
  14. K.-T. Chen, C.-Y. Liao, K.-Y. Hsiang, S.-H. Chang, F.-J. Hsieh, H. Liang, S.-H. Chiang, J.-H. Liu, K.-S. Li, S. T. Chang, and M. H. Lee*, “Random Polarization Distribution of Multi-Domain Model for Polycrystalline Ferroelectric HfZrO2, ” submitted to Semicond. Sci. Technol, 2020.
  15. Jun-Dao Luo*, Yun-Tien Yeh, Yu-Ying Lai, Chia-Feng Wu, Hao-Tung Chung, Yi-Shao Li, Kai-Chi Chuang, Wei-Shuo Li, Pin-Guang Chen, Min-Hung Lee*, and Huang-Chung Cheng, “Correlation between Ferroelectricity and Nitrogen Incorporation of Undoped Hafnium Dioxide Capacitor, ” Vacuum, vol. 176, pp. 109317, 2020.
  16. C. Lien*, C.-F. Hsieh, T.-C. Wu, C.-S. Yang, M.-H. Lee, J.-J. Xu, C.-W. Hu, C. Huang, S.-Z. Chang, and M.-H. Liao*, “The Investigation for Thickness-Dependent Electrical Performance on BaTiO3/BiFeO3 Bilayer Ferromagnetic Capacitors, ” IEEE Trans. on Electron Device, vol. 67, no. 8, pp. 3417-3423, 2020. (DOI: 10.1109/TED.2020.2998450)
  17. K.-T. Chen, H.-Y. Chen, C.-Y. Liao, G.-Y. Siang, J. Le, M.-H. Liao, K.-S. Li, S. T. Chang, and M. H. Lee*, “Non-Volatile Ferroelectric FETs using 5-nm Hf0.5Zr0.5O2 with High Data Retention and Read Endurance for 1T Memory Applications, ” IEEE Electron Device Letter, vol. 40, no. 3, pp. 399-402, 2019.
  18. M.-H. Liao*, C.-C. Wu, W.-J. Su, S.-C. Chen, and M.-H. Lee, “The development of a dynamic model to investigate the dielectric layer thickness effect for the device performance in triboelectric nano-generators, ” IEEE Trans. on Electron Device, vol. 66, no. 10, pp. 4478-4480, 2019. DOI: 10.1109/TED.2019.2933697
  19. K.-T. Chen, C.-Y. Liao, H.-Y. Chen, C. Lo, G.-Y. Siang, Y.-Y. Lin, Y.-J. Tseng, C. Chang, C.-Y. Chueh, Y.-J. Yang, M.-H. Liao, K.-S. Li, S. T. Chang, and M. H. Lee*, “Ferroelectric HfZrO2 FETs for Steep Switch Onset, ” Microelectronic Engineering, vol. 215, 110991, 2019.
  20. Kuan-Ting Chen, Yu-Chen Chou, Gao-Yu Siang, Hong-Yu Chen, Chieh Lo, Chun-Yu Liao, Shu-Tong Chang, and Min-Hung Lee*, “Evaluation of Sweep Modes for Switch Response on Ferroelectric Negative Capacitance FETs, ” Applied Physics Express, vol. 12, 071003, 2019.
  21. C. Lien*, C.-F. Hsieh, H.-S. Wu, T.-C. Wu, S.-J. Wei, Y.-H. Chu, M.-H. Liao*, and M.-H. Lee, “The Demonstration of High-Performance Multilayer BaTiO3/BiFeO3 Stack MIM Capacitors,” IEEE Trans. on Electron Devices, Vol. 65(11), pp. 4834-4838, 2018.
  22. M.-H. Liao*, K.-C. Huang, F.-A. Tsai, C.-Y. Liu, C. Lien, and M.-H. Lee, “Thickness dependence of electrical conductivity and thermo-electric power of Bi2.0Te2.7Se0.3/Bi0.4Te3.0Sb1.6 thermo-electric devices, ” AIP Advanced, vol. 8, 015020, 2018.
  23. K.-T. Chen, S.-S. Gu, Z.-Y. Wang, C.-Y. Liao, Y.-C. Chou, R.-C. Hong, S.-Y. Chen, H.-Y. Chen, G.-Y. Siang, J. Le, P.-G. Chen, M.-H. Liao, K.-S. Li, S. T. Chang, and M. H. Lee*, “Ferroelectric HfZrOx FETs on SOI Substrate with Reverse-DIBL (Drain-Induced Barrier Lowering) and NDR (Negative Differential Resistance), ” IEEE J. of the Electron Device Society, vol. 6, pp. 900-904, 2018.
  24. Y.-J. Lee*, Z.-P. Yang, P.-G. Chen, Y.-A. Hsieh, Y.-C. Yao, M.-H. Liao, M.-H. Lee, M.-T. Wang, and J.-M. Hwang, “Monolithic integration of GaN-based light- emitting diodes and metal-oxide-semiconductor field-effect transistors, ” Optics Express, vol. 22, no. S6, pp. A1589-A1595, 2014.
  25. Pin-Guang Chen, Kuan-Ting Chen, Ming Tang, Zheng-Ying Wang, Yu-Chen Chou and Min-Hung Lee*, “Steep Switching of In0.18Al0.82N/AlN/GaN MIS-HEMT (Metal Insulator Semiconductor High Electron Mobility Transistors) on Si for Sensor Applications, ” MDPI Sensors, Vol.18, 2795, 2018.
  26. M.-H. Liao*, H.-Y. Huang, F.-A. Tsai, C.-C. Chuang, M.-H. Hsu, C.-C. Lee, M.-H. Lee, C. Lien, C.-F. Hsieh, T.-C. Wu, H.-S. Wu, C.-W. Yao, “The achievement of the super short channel control in the magnetic Ge n-FinFETs with the negative capacitance effect, ” Vacuum, vol. 140, pp. 63-65, 2017.
  27. P. -G. Chen, H.-H. Chen, M. Tang, and M. H. Lee*, “Enhancement-Mode GaN MOS-HEMT with Quaternary InAlGaN-Barrier, ” Applied Mechanics and Materials, vol. 870, pp. 389-394, 2017.
  28. P.-G. Chen, M. Tang, M.-H. Liao, and M. H. Lee*, “In0.18Al0.82N/AlN/GaN MIS-HEMT on Si with Schottky-drain contact, ” Solid State Electronics, vol. 129, pp. 206-209, 2017.
  29. Chien Liu, Ping-Guang Chen, Meng-Jie Xie, Shao-Nong Liu, Jun-Wei Lee, Shao-Jia Huang, Sally Liu, Yu-Sheng Chen, Heng-Yuan Lee, Ming-Han Liao, Pang-Shiu Chen, and Min-Hung Lee*, “Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack, ” Jpn. J. Appl. Phys., vol. 55, 04EB08, 2016.
  30. Y.-C. Yao, Z.-P. Yang, J.-M. Hwang, H.-C. Su, J.-Y. Haung, T.-N. Lin, J.-L. Shen, M.-H. Lee, M.-T. Tsai, Y.-J. Lee*, “Coherent and Polarized Random Laser Emissions from Colloidal CdSe/ZnS Quantum Dots Plasmonically Coupled to Ellipsoidal Ag Nanoparticles, ” Advanced Optical Materials, vol. 5, Iss. 3, 1600746, 2016.
  31. Tsai, M.-C. Cheng, P.-H. Lee, M.-H. Lin, H.-C. Chen, M.-J.Divergent dielectric characteristics in cascaded high-K gate stacks with reverse gradient bandgap structures
  32. Tsai, M.-C. Lee, M.-H. Kuo, C.-L. Lin, H.-C. Chen, M.-J.In situ atomic layer nitridation on the top and down regions of the amorphous and crystalline high-K gate dielectrics
  33. K.-T. Chen, R.-Y. He, C.-W. Chen, W-H. Tu, C-Y. Kao, S. T. Chang*, and M. H. Lee*, “Metal insulator semiconductor field effect transistors with thin strained Ge film, ” Thin Solid Films, vol. 620, pp. 197-200, 2016.
  34. Ming-Kwen Tsai, Wei Huang, Sheng-Yao Hu, Jyh-Wei Lee, Yueh-Chien Lee*, Min-Hung Lee, Ji-Lin Shen, “Morphology control and characteristics of ZnO/ZnS nanorod arrays synthesised by microwave-assisted heating, ” Micro & Nano Letters, Vol. 11, Iss. 4, pp. 192–195, 2016.
  35. S. Liu, Z.-Y. Chen, S.-T. Chang, and M. H. Lee*, “Amorphous layers by electron beam evaporator deposition for hetero-junction with intrinsic thin layer solar cells applications, ” Int. J. Nanotechnol., vol. 13, no. 7, pp. 485-491, 2016.
  36. M. H. Lee*, Y.-T. Wei, K.-Y. Chu, J.-J. Huang, C.-W. Chen, C.-C. Cheng, M.-J. Chen, H.-Y. Lee, Y.-S. Chen, L.-H. Lee, and M.-J. Tsai, “Steep Slope and Near Non-Hysteresis of FETs with Antiferroelectric-like HfZrO2 for Low Power Electronics, ” IEEE Electron Device Letter, vol. 36, no. 4, pp. 294-296, 2015.
  37. J.-J. Huang, Y.-J. Tsai, M.-C. Tsai, M.-H. Lee, M.-J. Chen*, “Double nitridation of crystalline ZrO2/Al2O3 buffer gate stack with high capacitance, low leakage and improved thermal stability, ” Applied Surface Science, vol. 330, pp. 221-227, 2015.
  38. M. H. Lee*, S.-M. Hsu, J.-D. Shen, C. Liu, “Stress distribution of IGZO TFTs under mechanical rolling using finite element method for flexible applications, ” Microelectronic Engineering, vol. 138, pp. 77-80, 2015.
  39. J.-J. Huang, Y.-J. Tsai, M.-C. Tsai, L.-T. Huang, M.-H. Lee, M.-J. Chen*, “Impact of nitrogen depth profiles on the electrical properties of crystalline high-K gate dielectrics, ” Applied Surface Science, vol. 324, pp. 662-668, 2015.
  40. M. H. Lee*, Y.-T. Wei, C. Liu, J.-J. Huang, M. Tang, Y.-L. Chueh, K.-Y. Chu, M.-J. Chen, H.-Y. Lee, Y.-S. Chen, L.-H. Lee, and M.-J. Tsai, “Ferroelectricity of HfZrO2 in Energy Landscape with Surface Potential Gain for Low-Power Steep-Slope Transistors, ” IEEE J. of the Electron Device Society, vol. 3, no. 4, pp. 377-381, 2015.
  41. P.-G. Chen, M. Tang, and M. H. Lee*, “Indium-Based Ternary Barrier High-Electron-Mobility Transistors on Si Substrate With High ON/OFF Ratio for Power Applications, ” IEEE Electron Device Letter, vol. 36, no. 3, pp. 259-261, 2015.
  42. M.K. Tsai1, W. Huang2,3, S.Y. Hu4, Yueh-Chien Lee1, J.W. Lee5, M.H. Lee2, J.L. Shen3"Characteristics of controllable-shape well-aligned zinc oxide nanorods synthesised by microwave-assisted heating"
  43. J.-J. Huang, L.-T. Huang, M.-C. Tsai, M.-H. Lee, and M.-J. Chen*, “Enhancement of Electrical Characteristics and Reliability in Crystallized High-K Gate Dielectrics Treated with In-Situ Atomic Layer Doping of Nitrogen, ” Applied Surface Science, vol. 305, pp. 214-220, 2014.
  44. Y.-J. Lee*, Z.-P. Yang, P.-G. Chen, Y.-A. Hsieh, Y.-C. Yao, M.-H. Liao, M.-H. Lee, M.-T. Wang, and J.-M. Hwang, “Monolithic integration of GaN-based light- emitting diodes and metal-oxide-semiconductor field-effect transistors, ” Optics Express, vol. 22, no. S6, pp. A1589-A1595, 2014.
  45. M. H. Lee*, Y.-T. Wei, J.-C. Lin, C.-W. Chen, W.-H. Tu, M. Tang, “Ferroelectric Gate Tunnel Field-Effect Transistors with Low-Power Steep Turn-On, ” AIP Advances, vol. 4, no. 10, 107117, 2014.
  46. M. H. Lee*, P.-G. Chen, and S. T. Chang, “Analysis of Si:C on Relaxed SiGe by Reciprocal Space Mapping (RSM) for NMOSFETs Applications, ” ECS Journal of Solid State Science and Technology, vol. 3, no. 7, pp. 259-262, 2014.
  47. M. H. Lee*, J.-D. Luo, C.-C. Cheng, J.-S. Huang, Y.-L. Chueh, C.-W. Chen, T.-Y. Wu, Y.-S. Chen, H. Y. Lee, F. Chen, and M.-J. Tsai, “Nonlinear Bidirectional Selector without Rare Materials for Stackable Cross-bar Bipolar Memory Applications, ” Jpn. J. Appl. Phys., vol. 53, 08LE03, 2014.
  48. P.-G. Chen, Y.-T. Wei, M. Tang, and M. H. Lee*, “Experimental Demonstration of Ferroelectric Gate Stack AlGaN/GaN-on-Si MOS-HEMTs with Voltage Amplification for Power Applications, ” IEEE Trans. on Electron Device, vol. 61, no. 8, pp. 3014-3017, 2014.
  49. J.-J. Huang, L.-T. Huang, M.-C. Tsai, M.-H. Lee, and M.-J. Chen*, “Improvement of Capacitance Equivalent Thickness, Leakage Current, and Interfacial State Density Based on Crystallized High-K Dielectrics/Nitrided Buffer Layer Gate Stacks, ” ECS Journal of Solid State Science and Technology, vol. 2, no. 12, pp. 524-528, 2013.
  50. M. H. Lee*, J.-C. Lin, and C.-Y. Kao, “Hetero-Tunnel Field-Effect-Transistors with Epitaxially Grown Germanium on Silicon, ” IEEE Trans. on Electron Device, vol. 60, no.7, pp. 2423-2427, 2013.
  51. L.-T. Huang, M.-L. Chang, J.-J. Huang, H.-C. Lin, C.-L. Kuo, M.-H. Lee, C. W. Liu and M.-J. Chen*, “Improvement in electrical characteristics of HfO2 gate dielectrics treated by remote NH3 plasma, ” Applied Surface Science, vol. 266, pp. 89-93, 2013.
  52. Hsieh, B.-F., Chang, S.T. , Lee, M.H. Characterization of silicon-carbon alloy materials for future strained Si metal oxide semiconductor field effect transistors
  53. M. H. Lee*, J.-C. Lin, C.-Y. Kao, and C.-W. Chen, “Current Enhancement of Green Transistors as Compare to Conventional Tunnel FETs, ” Jpn. J. Appl. Phys., vol. 52, 04CC27, 2013.
  54. L.-T. Huang, M.-L. Chang, J.-J. Huang, H.-C. Lin, C.-L. Kuo, M.-H. Lee, C. W. Liu and M.-J. Chen*, “Improvement in electrical characteristics of HfO2 gate dielectrics treated by remote NH3 plasma, ” Applied Surface Science, vol. 266, pp. 89-93, 2013.
  55. L.-T. Huang, M.-L. Chang, J.-J. Huang, C.-L. Kuo, H.-C. Lin, M.-H. Liao*, M.-H. Lee and M.-J. Chen*, “Effect of hydrogen participation on the improvement in electrical characteristics of HfO2 gate dielectrics by post-deposition remote N2, N2/H2, and NH3 plasma treatments, ” J. Phys. D: Appl. Phys., vol. 46, 055103, 2013.
  56. M. H. Lee*, C.-W. Tai, and J.-J. Huang, “Correlation Between Gap State Density and Bias Stress Reliability of Nanocrystalline TFTs Comparing with Hydrogenated Amorphous Silicon TFTs, ” Solid State Electronics, vol. 80, pp. 72-75, 2013.
  57. M. H. Lee*, P.-G. Chen, and C.-C. Hsu, “Reliability Improvement of a-Si:H TFTs on Plastic Substrate with Saturation in Deep State after Multiple Bending Cycles, ” Thin Solid Films, vol. 544, pp. 103-106, 2013.
  58. M. H. Lee*, B.-F. Hsieh, and S. T. Chang, “Electrical Properties Correlated with Redistributed Deep States in a-Si:H Thin-Film Transistors on Flexible Substrates undergoing Mechanical Bending,” Thin Solid Films, vol. 528, pp. 82-85, 2013.
  59. S.-Y. Chen, M.-H. Lee, S. T. Chang*, C.-Y. Lin, K.-T. Chen, and B.-F. Hsieh, “Uniaxial stress effect and hole mobility in high-Ge content strained SiGe (110) P-channel metal oxide semiconductor field effect transistors, ” Thin Solid Films, vol. 544, pp. 487-490, 2013.
  60. M. H. Lee*, and K.-J. Chen, “The Fabrication and the Reliability of Poly-Si MOSFETs Using Ultra-Thin High-K/Metal-Gate Stack, ” Solid State Electronics, vol. 79, pp. 244-247, 2013.
  61. C.-J. Wu*, M.-H. Lee, and J.-Z. Jian, “Design and Analysis of Multichannel Transmission Filter Based on the Single-Negative Photonic Crystal, ” Progress In Electromagnetics Research, Vol. 136, pp. 561-578, 2013.
  62. M. H. Lee*, B.-F. Hsieh, S. T. Chang, and S. W. Lee, “Nickel Schottky Junction on Epi-Ge for Strained Ge Metal–Oxide–Semiconductor Field-Effect Transistors Source/Drain Engineering,” Thin Solid Films, vol. 520, pp. 3379-3381, 2012.
  63. M. H. Lee*, and P.-G. Chen, “The Investigation of Selective Pre-Pattern Free Self-Assembled Ge Nano-Dot Formed by Excimer Laser Annealing, ” Nanoscale Res. Lett., vol.7, p. 307, 2012.
  64. C. H. Kao*, K. C. Liu, M. H. Lee, S. N. Cheng, C. H. Huang, and W. K. Lin, “High-k Terbium Oxide (Tb2O3) Dielectric Deposited on the Strained-Si:C,” Thin Solid Films, vol. 520, pp. 3402-3405, 2012.
  65. M. H. Lee*, and S.-C. Weng, “p-type Tunneling Transistors with Poly-Si by Sequential Lateral Solidification (SLS) Growth Technique, ” Jpn. J. Appl. Phys., vol. 51, 02BJ13, 2012.
  66. M. H. Lee*, S. T. Chang, B.-F. Hsieh, J.-J. Huang, and C.-C. Lee, “Analysis and Modeling of Nano-Crystalline Silicon TFTs on Flexible Substrate with Mechanical Strain, ” J. Nanosci. Nanotechnol., vol. 11, pp. 10485-10488, 2011.
  67. H.-T. Hsu, M.-H. Lee, T.-J. Yang, Y.-C. Wang, and C.-J. Wu*, “A Multichanneled Filter in a Photonic Crystal Containing Coupled Defects, ” Progress In Electromagnetics Reasearch, Vol. 117, pp. 379-392, 2011.
  68. M. H. Lee*, S. T. Chang, B.-F. Hsieh, J.-J. Huang, and C.-C. Lee, “Analysis and Modeling of Nano-Crystalline Silicon TFTs on Flexible Substrate with Mechanical Strain, ” J. Nanosci. Nanotechnol., vol. 11, pp. 10485-10488, 2011.
  69. Min Hung Lee*, Bin-Fong Hsieh, Tung-Han Wu, and Shu Tong Chang, “p-type Tunneling Field-Effect Transistors on (100)- and (110)- Oriented Si Substrates, ” Jpn. J. Appl. Phys., vol. 50, 10PC01, 2011.
  70. M. H. Lee*, S. T. Chang, T.-H. Wu, and W.-N. Tseng, “Driving Current Enhancement of Strained Ge (110) p-type Tunnel FETs and Anisotropic Effect, ” IEEE Electron Device Letter, vol. 32, no. 10, pp. 1355-1357, 2011.
  71. C.-J. Wu*, M.-H. Lee, W.-H. Chen, and T.-J. Yang, “A Mid-Infrared Multichanneled Filter in A Photonic Crystal Heterostructure Containing Negative-Permittivity Materials, ” J. of Electromagn. Waves and Appl., Vol. 25, pp. 1360-1371, 2011.
  72. Y.-J. Lee*, M.-H. Lee, C.-M. Cheng, and C.-H. Yang, “Enhanced conversion efficiency of InGaN multiple quantum well solar cells grown on a patterned sapphire substrate, ” Appl. Phys Lett, vol. 98, 263504, 2011.
  73. I-Chung Chiu, Jung-Jie Huang, Yung-Pei Chen, I-Chun Cheng*, Jian Z. Chen*, and Min-Hung Lee, “The Influence of Electromechanical Stress on the Stability of Nanocrystalline Silicon Thin Film Transistors Made on Colorless Polyimide Foil, ” Electrochemical Society Transactions, vol. 33, no. 5, pp. 65-69, 2010.
  74. L. Chen, K. J. Chen, C. C. Lin, C. I. Chu, S. F. Hu*, M. H. Lee, and R.S. Liu*, “Combinatorial Approach to the Development of a Single Mass YVO4:Bi3+,Eu3+ Phosphor with Red and Green Dual Colors for High Color Rendering White Light-Emitting Diodes, ” J. Comb. Chem., vol. 12, pp. 587-594, 2010.
  75. I.-C. Chiu, J.-J. Huang, Y.-P. Chen, I.-C. Cheng*, J. Z. Chen*, and M. H. Lee, “Electromechanical Stability of Flexible Nanocrystalline Silicon Thin Film Transistors, ” IEEE Electron Device Letter, vol. 31, no. 3, pp. 222- 224, 2010.
  76. M. H. Lee*, S. T. Chang*, S. Maikap, C.-Y. Peng, and C.-H. Lee, “High Ge Content of SiGe Channel p-MOSFETs on Si (110) Surfaces, ” IEEE Electron Device Letter, vol. 31, no. 2, pp. 141- 143, 2010.
  77. M. H. Lee*, S. L. Wu, M.-J. Yang, K.-J. Chen, G.-L. Luo, L.-S. Lee, and M.-J. Kao, “High Performance Poly-Si TFTs using Ultra-Thin HfSiOx Gate Dielectric for Monolithic 3D Integrated Circuits and System on Glass Applications, ” IEEE Electron Device Letter, vol. 31, no. 8, pp. 824-826, 2010.
  78. M. H. Lee*, S. T. Chang, C.-C. Lee, J.-J. Huang, G.-R. Hu, and Y.-S. Huang, “The Gap State Density of Micro/Nano-Crystalline Silicon Active Layer on Flexible Substrate, ” Thin Solid Films, vol. 518, pp. S246-S249, 2010.
  79. Min-Hung Lee*, Shu-Tong Chang, Yi-Chun Wu, Ming Tang, and Chung-Yi Lin, “Mechanical Bending Cycles of Hydrogenated Amorphous Silicon Layer on Plastic Substrate by Plasma-Enhanced Chemical Vapor Deposition for Use in Flexible Displays, ” Jpn. J. Appl. Phys., vol. 48, 021301, 2009.
  80. M. H. Lee, S. T. Chang*, C.-Y. Peng, S. Maikap, and S.-H. Liao, “Studying the Impact of Carbon on Device Performance for Strained-Si MOSFETs, ” Thin Solid Films, vol.517, pp.105-109, 2008.
  81. M. H. Lee*, S. T. Chang, S. Maikap, and C.-F. Huang, “The Role of Carbon on Performance of Strained-Si:C Surface Channel NMOSFETs, ” Solid State Electronics, vol. 52, 1569-1572, 2008.
  82. P. S. Chen*, S.W. Lee, M. H. Lee, and C. W. Liu, “Formation of relaxed SiGe on the buffer consists of modified SiGe islands by Si pre-intermixing, ” Applied Surface Science, vol. 254, pp. 6076-6080, 2008.
  83. M. H. Lee*, S. T. Chang, S. Maikap, K.-W. Shen and W.-C. Wang, “Short Channel Effect Improved Strained-Si:C-Source/Drain PMOSFETs, ” Applied Surface Science, vol. 254, pp. 6144-6146, 2008.
  84. M. H. Lee*, S. T. Chang, S. W. Lee, P. S. Chen, K.-W. Shen, and W.-C. Wang, “Strained-Si with Carbon Incorporation for MOSFET Source/Drain Engineering, ” Applied Surface Science, vol. 254, pp. 6147-6150, 2008.
  85. S.W. Lee*, P. S. Chen, M. H. Lee, and C. W. Liu, “Modified growth of Ge quantum dots using C2H4 and SiCH6 mediation by ultra-high vacuum chemical vapor deposition,” Applied Surface Science, vol. 254, pp. 6261-6264, 2008.
  86. J.-J. Huang*, M. H. Lee, C.-J. Tsai, and Y.-H. Yeh “Hydrogenated Amorphous Silicon TFT Fabricated on Glass and Polyimide Substrate at 200 C,” Japanese Journal of Applied Physics, vol. 46, No. 3B, pp. 1295-1298, 2007.
  87. C.-Y. Peng, F. Yuan, C.-Y. Yu, P.-S. Kuo, M. H. Lee, S. Maikap, C.-H. Hsu, and C. W. Liu*, “Hole mobility enhancement of Si0.2Ge0.8 quantum well channel on Si,” Appl. Phys Lett, vol. 90, 012114, 2007.
  88. S. Maikap*, M. H. Lee, S. T. Chang, and C. W. Liu, “Characteristics of strained-germanium p- and n-channel field effect transistors on Si (111) substrate,” Semicond. Sci. Technol, Vol. 22 pp. 342-347, 2007.
  89. P. S. Chen, S. W. Lee, M. H. Lee and C. W. Liu*, “Growth of high-quality relaxed SiGe films with an intermediate Si layer for strained Si n-MOSFETs, ” Semicond. Sci. Technol, Vol. 21 pp. 479-485, 2006.
  90. J.-Y. Wei, S. Maikap, M. H. Lee, C. C. Lee, and C. W. Liu*, “Hole confinement at Si/SiGe heterojunction of strained-Si N and PMOS devices,” Solid State Electronics, Vol. 50, pp. 109-113, 2006.
  91. C. C. Yeo*, B. J. Cho, M. H. Lee, C. W. Liu, K. J. Choi, and T. W. Lee, “Thermal Stability Study of Si cap/ultrathin Ge/Si and Strained Si/Si1-xGex/Si nMOSFETs with HfO2 Gate Dielectric,” Semiconductor Science & Technology, vol. 21, pp. 665-669, 2006.
  92. M. H. Liao*, S. T. Chang, M. H. Lee, S. Maikap, and C. W. Lee, “Abnormal Hole Mobility of Biaxial Strained-Si,” J. Appl. Phys., vol. 98, 0066104, 2005.
  93. P. S. Chen, S. W. Li, Y. H. Liu, M. H. Lee, M.-J. Tsai and C. W. Liu*, “Ultra-high-vacuum chemical vapor deposition of hetero-epitaxial Si1-x-yGexCy thin films on Si(001) with ethylene (C2H4) precursor as carbon source,” Materials Science in Semiconductor Processing, Vol. 8, No. 1-3, pp. 15-19, 2005.
  94. C. C. Yeo*, B. J. Cho, F. Gao, S. J. Lee, M. H. Lee, C.-Y. Yu, C. W. Liu, L. J. Tang, and T. W. Lee, “Electron Mobility Enhancement Using Ultrathin Pure Ge on Si Substrate,” IEEE Electron Device Letter, Vol. 26, No. 10, pp. 761-763, 2005.
  95. S. T. Chang*, Y. H. Liu, M.-H. Lee, S. C. Lu, and M.-J. Tsai, “Optimal Ge Profile Design for Base Transit Time of Si/SiGe HBTs,” Materials Science in Semiconductor Processing, vol. 8/1-3, pp. 289-294, 2005.
  96. S. W. Lee*, Y. L. Chueh, L. J. Chen, L. J. Chou, M. H. Lee, M.-J. Tsai, and C. W. Liu, “The growth of strained Si on high-quality relaxed Si1-xGex with an intermediate Si1-yGey layer,” Journal of Vacuum Science and Technology A, vol. 23, No. 4, pp. 1141-1145, 2005.
  97. W.-C. Hua, M. H. Lee, P. S. Chen, S. C. Lu, M.-J. Tsai, and C. W. Liu*, “Treading Dislocation Induced Low Frequency Noise in Strained-Si Field-Effect Transistors,” IEEE Electron Device Letter, vol. 26, No. 9, pp. 667-669, 2005.
  98. C. W. Liu*, M. H. Lee, Y. C. Lee, P. S. Chen, C.-Y. Yu, J.-Y. Wei, and S. Maikap, “Evidence of Si/SiGe heterojunction roughness scattering,” Appl. Phys. Lett., Vol. 85, No. 21, pp. 4947-4949, 2004.
  99. S. Maikap, C.-Y. Yu, S.-R. Jan, M. H. Lee, and C. W. Liu*, “Mechanically strained strained-Si NMOSFETs,” IEEE Electron Device Letter, Vol. 25, No. 1, pp. 40-42, 2004.
  100. W.-C. Hua, M. H. Lee, P. S. Chen, S. Maikap, C. W. Liu*, and K. M. Chen, “Ge Outdiffusion Effect on Flicker Noise in Strained-Si NMOSFETs,” IEEE Electron Device Letters, Vol. 25, No. 10, pp. 693-695, 2004.
  101. M. H. Lee, C.-Y. Yu, F. Yuan, K. -F. Chen, C. -C. Lai, and C. W. Liu*, “Reliability Improvement of Rapid Thermal Oxide Using Gas Switching,” IEEE Trans. Semiconductor Manufacturing, Vol. 16, pp. 656-659, 2003.
  102. C. W. Liu*, B.-C. Hsu, K.-F. Chen, M. H. Lee, C.-R. Shie, and P.-S. Chen, “Strain-induced growth of SiO2 dots by liquid phase deposition,” Appl. Phys. Lett., Vol. 82, No. 4, pp. 589-591, 2003. (This paper has been selected for the issue of the Virtual Journal of Nanoscale Science & Technology, Vol. 7, No. 5, Feb. 3, 2003.)
  103. Min-Hung Lee, Kuan-Fu Chen, Chang-Chi Lai, Chee Wee Liu, Woei-Wu Pai, Miin-Jang Chen, and Ching-Fuh Lin, “The Roughness-Enhanced Light Emission from Metal-Oxide-Silicon Light-Emitting Diodes Using Very High Vacuum Prebake, ” Jpn. J. Appl. Phys. Part2 Lett., vol. 41, no. 3B, pp. L326-L328, Mar. 15, 2002.
  104. C.-H. Lin, F. Yuan, C.-R. Shie, K.-F. Chen, B.-C. Hsu, M. H. Lee, and C. W. Liu*, “Roughness- Enhanced Reliability of MOS Tunneling Diodes,” IEEE Electron Device Letter, Vol. 23, No. 7, pp. 431-433, 2002.
  105. C.-H. Lin, M. H. Lee, and C. W. Liu, "Correlation between Si-H/D bond desorption and injected electron energy in metal-oxide-semiconductor tunneling diodes," Appl. Phys. Lett., vol. 78, no. 5, pp. 637-639, Jan., 2001.
  106. C. W. Liu, C.-H. Lin, M. H. Lee, S. T. Chang, Y. H. Liu, M.-J. Chen, and C.-F. Lin, "Enhanced reliability of electroluminescece from metal-oxide-silicon tunneling diodes by deuterium incorporation," Appl. Phys. Lett., vol. 78, no. 10, pp. 1397-1399, Mar., 2001.
  107. M.-J. Chen, C.-F. Lin, M. H. Lee, S. T. Chang, and C. W. Liu, "Carrier lifetime measurement on Electroluminescent Metal-Oxide-Silicon Tunneling Diodes," Appl. Phys. Lett., vol. 79, no. 14, pp. 2264-2266, 2001.
  108. M. H. Lee and C. W. Liu, "A Novel Illuminator Design in a Rapid Thermal Process," IEEE Trans. Semiconductor Manufacturing, vol. 14, no. 2, pp. 152-156, May 2001.
  109. M. H. Lee, C.-H. Lin, and C. W. Liu, "Novel Methods to Incorporate Deuterium in the MOS Structures," IEEE Electron Device Lett., vol. 22, no. 11, pp. 519-521, Nov. 2001.
  110. C.-H. Lin, B.-C. Hsu, M. H. Lee, and C. W. Liu, "A Comprehensive Study of Inversion Current in MOS Tunneling diodes," IEEE trans. Electron Devices., vol. 48, no. 9, pp. 2125-2130, Sep. 2001.
  111. C.-F. Lin, C. W. Liu, M.-J. Chen, M. H. Lee, and I. C. Lin, “Electroluminescence at Si Band Gap Energy Based on Metal-oxide-silicon Structures,” J. Appl. Phys., vol. 87, no. 12, pp. 8793-8795, 2000.
  112. C. W. Liu, M. H. Lee, M.-J. Chen, I. C. Lin, and C-F Lin, “Room-temperature electroluminescence from electron-hole plasmas in the metal-oxide-silicon tunneling diodes,” Appl. Phys. Lett., vol 76, no. 12, pp. 1516-1518, 2000.
  113. C.-F. Lin, C. W. Liu, M.-J. Chen, M. H. Lee, and I. C. Lin, “Infrared Electroluminescence from Metal-Oxide-Semiconductor Structures on Silicon,” J. of Phys.: condensed matter, vol. 12, pp. L205-210, 2000.
  114. C. W. Liu, M. H. Lee, M.-J. Chen, C.-F. Lin, and M. Y. Chern, "Roughness-Enhanced Electroluminescence from Metal Oxide Silicon Tunneling Diodes," IEEE Electron Device Lett., vol. 21, no. 6, pp. 601-603, Dec., 2000.
  115. C. W. Liu, M. H. Lee, S. T. Chang, M.-J. Chen, and C.-F. Lin, " Room-temperature electroluminescence from the metal oxide silicon tunneling diodes on (110) substrates," Jpn. J. Appl. Phys., vol. 39, no. 10B, pp. L1016 - L1018, Oct., 2000.
  116. C. W. Liu, M.-J. Chen, I. C. Lin, M. H. Lee, and C.-F. Lin, " Temperature dependence of the electron-hole-plasma electroluminescence from the metal-oxide-silicon tunneling diodes,” Appl. Phys. Lett., vol. 77, no. 8, pp. 1111- 1113, Aug., 2000.
  117. C. W. Liu, W. T. Liu, M. H. Lee, W. S. Kuo, and B. C. Hsu, "A Novel Photodetector Using MOS Tunneling Structures," IEEE Electron Device Lett., vol. 21, no. 6, pp. 307-309, Jun., 2000.

  1. H.-L. Chiang, J.-F. Wang, K.-H. Lin, C.-H. Nien, J.-J. Wu, K.-Y. Hsiang, C.-P. Chuu, Y.-W. Chen, X.W. Zhang, C. W. Liu, Tahui Wang, C.-C. Wang, M.-H. Lee, M.-F. Chang, C.-S. Chang, T.C. Chen*, “Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to Array, ” accepted by Symposia on VLSI Technology and Circuits, Honolulu, Hawaii, 12-17, June, 2022.
  2. C.-Y. Liao, K.-Y. Hsiang, Z.-F. Lou, H.-C. Tseng, C.-Y. Lin, Z.-X. Li, F.-C. Hsieh, C.-C. Wang, F.-S. Chang, W.-C. Ray, Y.-Y. Tseng, S. T. Chang, T.-C. Chen, and M. H. Lee*, “Endurance > 1011 Cycling of 3D GAA Nanosheet Ferroelectric FET with Stacked HfZrO2 to Homogenize Corner Field Toward Mitigate Dead Zone for High-Density eNVM, ” accepted by Symposia on VLSI Technology and Circuits, Honolulu, Hawaii, 12-17, June, 2022.
  3. Z.-F. Luo, C.-Y. Liao, K.-Y. Hsiang, C.-Y. Lin, Y.-D. Lin, P.-C. Yeh, C.-Y. Wang, H.-Y. Yang, P.-J. Tzeng, T.-H. Hou, Y.-T. Tang*, and M. H. Lee*, “Characterization of Double HfZrO2 based FeFET toward Low-Voltage Multi-Level Operation for High Density Nonvolatile Memory, ” International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, Apr. 19-21, 2022.
  4. K.-Y. Hsiang, C.-Y. Liao, Y.-Y. Lin, Z.-F. Lou, C.-Y. Lin, J.-Y. Lee, F.-S. Chang, Z.-X. Li, H.-C. Tseng, C.-C. Wang, W.-C. Ray, T.-H. Hou, T.-C. Chen*, C.-S. Chang*, and M. H. Lee*, “Correlation between Access Polarization and High Endurance (~ 1012 cycling) of Ferroelectric and Anti-Ferroelectric HfZrO2, ” 2022 IEEE International Reliability Physics Symposium (IRPS 2022), P9, Dallas, Texas, Mar. 27 - 31, 2022 (hybrid).
  5. Yu-Chen Chen*, Kuo-Yu Hsiang, Ying-Tsan Tang, Min-Hung Lee and Pin Su*, “NLS based Modeling and Characterization of Switching Dynamics for Antiferroelectric/Ferroelectric Hafnium Zirconium Oxides, ” accepted by Technical Digest, International Electron Device Meeting (IEDM), San Francisco, Dec. 11-15, 2021.
  6. C.-Y. Liao, K.-Y. Hsiang, Z.-F. Luo, C.-Y. Lin, Y.-D. Lin, P.-C. Yeh, C.-Y. Wang, H.-Y. Yang, P.-J. Tzeng, Y.-T. Tang, T.-H. Hou, and M. H. Lee*, “BEOL (Back End of Line) Applicable Ferroelectric HfZrO2 by PEALD with Low Temperature Annealing, Wake-up Free, and Synaptic Application, ” accepted by 52th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, Dec. 8-11, 2021.
  7. Yu-De Lin*, Po-Chun Yeh, Ying-Tsan Tang, Jian-Wei Su, Hsin-Yun Yang, Yu-Hao Chen, Chih-Pin Lin, Po-Shao Yeh, Jui-Chin Chen, Pei-Jer Tzeng, Min-Hung Lee, Tuo-Hung Hou#, Shyh-Shyuan Sheu, Wei-Chung Lo, and Chih-I Wu, “Improving Edge Dead Domain and Endurance in Scaled HfZrOx FeRAM, ” accepted by Technical Digest, International Electron Device Meeting (IEDM), San Francisco, Dec. 11-15, 2021.
  8. Hong Liang, Meng-Huan Chou, Min-Hung Lee, Pang-Shiu Chen, Shih-Feng Tseng, Chao-An Jong*, “Palladium Film Etch Using Sequential Laser Irradiation and Vaporized Aicd Etch Process” accepted by AVS 21st International Conference on Atomic Layer Deposition (ALD 2021) featuring the 8th International Atomic Layer Etching Workshop (ALE 2021).
  9. M. H. Lee*, C.-Y. Liao, K.-Y. Hsiang, S.-T. Fan, and C. W. Liu, “Polycrystalline Ferroelectric HfZrO2-based Negative Capacitance FETs with Polarization Phases and Domains, ” Materials Research Society (MRS) Spring Meeting & Exhibit, FL09, Apr. 17-23, 2021. (virtual)
  10. K.-Y. Hsiang, K.-T. Chen, C.-Y. Liao, T.-M. Wu, J.-H. Liu, S.-H. Chang, F.-C. Hsieh, S.-H. Chiang, H. Liang, Y.-D. Lin, P.-C. Yeh, C.-Y. Wang, H.-Y. Yang, P.-J. Tzeng, S. T. Chang, Y.-T Tang* and M. H. Lee*, “Remnant Polarization and Junction Current Enhancement of Ferroelectric HfZrO2 with Molybdenum Capping Electrode, ” 51th IEEE Semiconductor Interface Specialists Conference (SISC), 10.3, San Diego, Dec. 16-19, 2020.
  11. K.-T. Chen, K.-Y. Siang, C.-Y. Liao, S.-H. Chang, F.-J. Hsieh, J.-H. Liu, S.-H Chiang, H. Liang, S. T. Chang, and M. H. Lee*, “Voltage Amplification with Charge Balance of Ferroelectric HfO2-based Layer on Geometry Design, ” International Electron Devices and Materials Symposium (IEDMS), PO5-2, Chang Gung University, Tao-Yuan City, Taiwan, Oct. 15-16, 2020.
  12. M. H. Lee*, “Ferroelectric HfZrO2 FETs for Emerging Technologies, ” International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, Aug. 10-13, 2020.
  13. Min-Hung Lee*, “Prospect of Ultra-Thin Ferroelectric HfZrO2 for Low-Power Applications, ” China Semiconductor Technology International Conference (CSTIC) 2020, Shanghai, China, June 30-July 1, 2020 (online).
  14. P.-Y. Lu, Y.R. Li, T.-H. Chan, H.-T. Hung, C.-R. Kao, M.-H. Lee, and M.-H. Liao*, “The Demonstration of High-Quality Carbon Nano-Tubes (CNTs) and Advanced Patterned Technique for the Application in Vertically 3D Integrated Technologies, ” accepted by 70th ECTC (Electronic Components and Technology Conference), Walt Disney World Swan and Dolphin Resort Lake Buena Vista, FL, May 26-29, 2020.
  15. K.-T. Chen, C. Lo, Y.-Y. Lin, C.-Y. Chueh, C. Chang, G.-Y. Siang, Y.-J. Tseng, Y.-J. Yang, F.-C. Hsieh, S.-H. Chang, H. Liang, S.-H. Chiang, J.-H. Liu, Y.-D. Lin, P.-C. Yeh, C.-Y. Wang, H.-Y. Yang, P.-J. Tzeng, M.-H. Liao, S. T. Chang#, Y.-Y. Tseng+, and M. H. Lee*, “ Double Layers Omega FETs with Ferroelectric HfZrO2 for One-Transistor Memory, ” accepted by 2020 IEEE International Reliability Physics Symposium (IRPS 2020), Dallas, Texas, Mar. 29 - Apr. 2, 2020.
  16. M. H. Lee*, K.-T. Chen, C.-Y. Liao, G.-Y. Siang, C. Lo, H.-Y. Chen, Y.-J. Tseng, C.-Y. Chueh, C. Chang, Y.-Y. Lin, Y.-J. Yang, F.-C. Hsieh, S. T. Chang, M.-H. Liao, K.-S. Li, and C. W. Liu, “Bi-directional Sub-60mV/dec, Hysteresis-Free, Reducing Onset Voltage and High Speed Response of Ferroelectric-AntiFerroelectric Hf0.25Zr0.75O2 Negative Capacitance FETs, ” Technical Digest, International Electron Device Meeting (IEDM), accepted, San Francisco, Dec. 7-11, 2019.
  17. Y.D. Lin, H.Y. Lee*, Y.T. Tang, P.C. Yeh, H.Y. Yang, P.S. Yeh, C.Y. Wang, J.W. Su, S.H. Li, S.S. Sheu, T.H. Hou, W.C. Lo, M. H. Lee, M.F. Chang, Y.C. King and C.J. Lin, “3D Scalable, Wake-up Free, and Highly Reliable FRAM Technology with Stress-Engineered HfZrOx, ” Technical Digest, International Electron Device Meeting (IEDM), accepted, San Francisco, Dec. 7-11, 2019.
  18. K.-T. Chen, C.-Y. Liao, G.-Y. Siang, H.-Y. Chen, C. Lo, Y.-J. Yang, Y.-Y. Lin, Y.-J. Tseng, C. Chang, C.-Y. Chueh, S. T. Chang, and M. H. Lee*, “Device Dimension Effect of Subthreshold Swing for Ferroelectric Polycrystalline HfZrO2 FETs, ” The Eighth International Symposium on Control of Semiconductor Interfaces (ISCSI-VIII), accepted, Sendai, Japan, Nov. 27-30, 2019.
  19. K.-T. Chen, Y.-F. Chung, Y.-T. Tang, S. T. Chang* and M. H. Lee*, “Impact of Hafnium Oxide Based Ferroelectric Material on Monolayer Black Phosphorus Transistor for Negative Capacitance and Memory Application, ” International Conference on Solid State Devices and Materials (SSDM), pp. 655-656, Nagoya, Japan, Sep. 2-5, 2019.
  20. M. H. Lee*, K.-T. Chen, C.-Y. Liao, G.-Y. Siang, H.-Y. Chen, C. Lo, C.-Y. Chueh, T.-J. Tseng, Y.-J. Yang, Y.-Y. Lin, C. Chang, S. T. Chang, and K.-S. Li, “Ferroelectric HfZrO2 FETs for Steep Switch Onset, ” 2019 Insulating Films on Semiconductors (INFOS 2019), 2-2, Cambridge University, Cambridge, UK, Jun. 30-Jul. 3, 2019.
  21. K.-T. Chen, C.-Y. Liao, C. Lo, H.-Y. Chen, G.-Y. Siang, S. Liu, S.-C. Chang, M.-H. Liao, S.-T. Chang, and M. H. Lee*, “Improvement on Ferroelectricity and Endurance of Ultra-Thin HfZrO2 Capacitor with Molybdenum Capping Electrode, ” The 3rd Electron Devices Technology and Manufacturing (EDTM), Mat 1: Ferroelectric Materials and Devices, Singapore, Mar. 13-15, 2019.
  22. Kai-Shin Li*, Yun-Jie Wei, Yi-Ju Chen, Wen-Cheng Chiu, Hsiu-Chih Chen, Min-Hung Lee, Yu-Fan Chiu, Fu-Kuo Hsueh, Bo-Wei Wu, Pin-Guang Chen, Tung-Yan Lai, Chun-Chi Chen, Jia-Min Shieh, Wen-Kuan Yeh, Sayeef Salahuddin, Chenming Hu, “Negative-Capacitance FinFET Inverter, Ring Oscillator, SRAM Cell, and Ft, ” Technical Digest, International Electron Device Meeting (IEDM), pp. 731-734, San Francisco, Dec. 1-5, 2018.
  23. M. H. Lee*, K.-T. Chen, C.-Y. Liao, S.-S. Gu, G.-Y. Siang, Y.-C. Chou, H.-Y. Chen, J. Le, R.-C. Hong, Z.-Y. Wang, S.-Y. Chen, P.-G. Chen, M. Tang, Y.-D. Lin, H.-Y. Lee, K.-S. Li, and C. W. Liu, “Extremely Steep Switch of Negative-Capacitance Nanosheet GAA-FETs and FinFETs, ” Technical Digest, International Electron Device Meeting (IEDM), pp. 735-738, San Francisco, Dec. 1-5, 2018.
  24. M. H. Lee*, C.-Y. Liao, G.-Y. Siang, C. Lo, H.-Y. Chen, S.-Y. Chen, Y.-J. Tseng, K.-T. Chen, S. T. Chang, and K.-S. Li, “Ultra-Thin Ferroelectric HfZrO2 by Atomic-Layer Deposition (ALD) for Steep Slope Transistors Application, ” 31nd International Microprocesses and Nanotechnology Conference (MNC), 16A-8-1, Sapporo, Japan, Nov. 11-13, 2018.
  25. K.-T. Chen, C. -Y. Liao, R. -C. Hong, S. -S. Gu, Y. -C. Chou, Z. -Y. Wang, S. -Y. Chen, G. -Y. Siang, H. -Y. Chen, C. Lo, P. -G. Chen, Y. -J. Lee, M. -H. Liao, K. -S. Li, S. T. Chang, M. -H. Lee*, “Sub-60mV/dec Subthreshold Swing on Reliability of Ferroelectric HfZrOx Negative-Capacitance FETs with DC Sweep and AC Stress Cycles, ” International Conference on Solid State Devices and Materials (SSDM), pp. 181-182, Tokyo, Japan, Sep. 9-13, 2018.
  26. 11. P.-G. Chen, Y.-C. Chou, S.-S. Gu, R.-C. Hong, Z.-Y. Wang, S.-Y. Chen, C.-Y. Liao, M. Tang, M.-H. Liao, and M. H. Lee*, “Steep Switch-Off of In0.18Al0.82N/AlN/GaN on Si MIS-HEMT, ” The 7th IEEE International Symposium on Next-Generation Electronics (ISNE 2018), Taipei, Taiwan, May 7-9, 2018.
  27. C.-Y. Liao, R.-C. Hong, S.-S. Gu, Y.-C. Chou, Z.-Y. Wang, S.-Y. Chen, and M. H. Lee*, “Coercive Voltage of Dipole Switching on Ferroelectric Hf1-xZrxO2 for Steep Subthreshold Swing Operation, ” Materials Research Society (MRS) Spring Meeting & Exhibit, EP01.03.03, Phoenix, Arizona, Apr. 2-6, 2018. (Best Poster Award Nominee)
  28. M. H. Lee*, C.-Y. Kuo, C.-H. Tang, H.-H. Chen, C.-Y. Liao, R.-C. Hong, S.-S. Gu, Y.-C. Chou, Z.-Y. Wang, S.-Y. Chen, P.-G. Chen, M.-H. Liao, and K.-S. Li, “Ferroelectric Characteristics of Ultra-thin Hf1-xZrxO2 Gate Stack and 1T Memory Operation Applications, ” 2018 IEEE Electron Devices Technology and Manufacturing (2nd EDTM), pp. 271-273, Kobe, Japan, Mar. 13-16, 2018.
  29. A. C. Kummel*, E. Chagarov, M. Kavrik, M. B. Katz, N. A. Sanford, A. Davydov, and M. H. Lee, “Surface Free Energy and Interface Strain in HfO2 and HZO Ferroelectric Formation, ” 48th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, Dec. 6-9, 2017.
  30. M. H. Lee*, P.-G. Chen, S.-T. Fan, Y.-C. Chou, C.-Y. Kuo, C.-H. Tang, H.-H. Chen, S.-S. Gu, R.-C. Hong, Z.-Y. Wang, S.-Y. Chen, C.-Y. Liao, K.-T. Chen, S. T. Chang, M.-H. Liao, K.-S. Li, and C. W. Liu, “Ferroelectric Al:HfO2 Negative Capacitance FETs, ” Technical Digest, International Electron Device Meeting (IEDM), pp. 565-568, San Francisco, Dec. 2-6, 2017.
  31. M. H. Lee*, Y.-C. Chou, S.-S. Gu, C.-Y. Liao, R.-C. Hong, Z.-Y. Wang, S.-Y. Chen, P.-G. Chen, C.-Y. Kuo, C.-H. Tang, H.-H. Chen, K.-T. Chen, S. T. Chang, M.-H. Liao, and K.-S. Li, “Characteristics of Ultra-Thin Ferroelectric HfZrOx on Negative-Capacitance FETs for Steep Subthreshold Swing, ” 2017 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES – SCIENCE AND TECHNOLOGY - (IWDTF 2017), S7-1, Todaiji Temple Cultural Center, Nara, Japan, Nov. 20-22, 2017
  32. M. H. Lee*, R.-C. Hong, S.-S. Gu, Y.-C. Chou, C.-Y. Liao, Z.-Y. Wang, S.-Y. Chen, P.-G. Chen, C.-Y. Kuo, C.-H. Tang, H.-H. Chen, K.-T. Chen, S. T. Chang, M.-H. Liao, and K.-S. Li, “Characteristics of Ferroelectric Hf-based Oxide and Diversity Applications, ” International Symposium on Memory Devices for Abundant Data Computing (MD 2017), Hong Kong, Sep. 22-24, 2017.
  33. E. R. Hsieh, J. W. Lee, M. H. Lee, and Steve S. Chung*, “The guideline on designing face-tunneling FET for large-scale-device applications in IoT, ” IEEE Silicon Nanoelectronics Workshop, SNW 2017, pp. 3-4, Kyoto, Japan, Jun. 4-5, 2017.
  34. Y.-C. Yao, Z.-P. Yang, J.-Y. Haung, M.-H. Lee and Y.-J. Lee*, “Plasmonically Induced Coherent and Polarized Random Laser Emissions in Colloidal CdSe/ZnS Quantum Dots with Ellipsoidal Ag Nanoparticles, ” Conference on Lasers and Electro-Optics (CLEO), SW4O.7, San Jose, CA, May 14-19, 2017
  35. M. H. Lee*, P.-G. Chen, S.-T. Fan, C.-Y. Kuo, H.-H. Chen, S.-S. Gu, Y.-C. Chou, C.-H. Tang, R.-C. Hong, Z.-Y. Wang, M.-H. Liao, K.-S. Li, M.-C. Chen, and C. W. Liu, “Negative Capacitance FETs with Steep Switching by Ferroelectric Hf-based Oxide, ” International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), T3-1, Hsinchu, Taiwan, Apr. 24-27, 2017.
  36. M. H. Lee*, P.-G. Chen, S.-T. Fan, J.-Y. Kuo, C.-H. Tang, H.-H. Chen, and C. W. Liu, “Ferroelectricity in Hf-based Oxide: Negative Capacitance FETs for Steep Subthreshold Swing, ” Materials Research Society (MRS) Spring Meeting & Exhibit, ED7.4.04, Phoenix, Arizona, Apr. 17-21, 2017.
  37. M. H. Lee*, C.-W. Tai, M.-H. Liao, and S. T. Chang, “Green Energy Computing of Heterojunction with Intrinsic Thin Layer (HIT) Solar Cell by CAD (Computer Aided Design), ” Future Technology Conference (FTC), pp. 1327-1330, San Francisco, Dec. 6-7, 2016.
  38. Lee, M.H* , Fan, S.-T, Tang, C.-H, Chen, P.-G, Chou, Y.-C, Chen, H.-H, Kuo, J.-Y, Xie, M.-J, Liu, S.-N, Liao, M.-H, Jong, C.-A, Li, K.-S, Chen, M.-C, Liu, C.W, “Physical thickness 1.x nm ferroelectric HfZrOx negative capacitance FETs, ” Technical Digest, International Electron Device Meeting (IEDM), San Francisco, pp. 12.1.1-12.1.4 , Dec. 3-7, 2016.IEDM, San Francisco, Dec. 3-7, 2016.
  39. Bing Mau Chen, Zheng-Jia Zeng, Pin-Zhi Chen, Cheng-Ying Wang, Chao-An Jong, Pang-Shiu Chen, Hung-Ru Hsu, M-H Lee, Yi Ding, Ming-Juei Wu, “Study Characteristics of Atomic Layer Deposition Al2O3 Thin Film on Si Substrate by SPM and Alkaline Water Surface Treatment, ” Optics & Photonics Taiwan, the International Conference (OPTIC 2016), Taipei, Taiwan, Dec. 3-5, 2016.
  40. M. H. Lee*, P.-G. Chen, C. Liu, K.-T. Chen, Y.-T. Wei, J.-C. Lin, S.-N. Liu, H.-H. Chen, C.-H. Tang, W.-H. Tu, K.-S. Li, M.-C. Chen, M.-H. Liao, C.-H. Cheng, S. T. Chang, and C. W. Liu, “Steep Subthreshold Swing with Negative Capacitance Effect using Ferroelectric Gate Stack, ” International Electron Devices and Materials Symposium (IEDMS), D3-I, Taipei, Taiwan, Nov. 24-25, 2016.
  41. P. G. Chen, M. Tang, M.-H. Liao, and M. H. Lee*, “Steep Turn-Off of In0.18Al0.82N/AlN/GaN MIS-HEMT on Si, ” International Electron Devices and Materials Symposium (IEDMS), PA-18, Taipei, Taiwan, Nov. 24-25, 2016.
  42. M. H. Lee*, P.-G. Chen, C. Liu, K.-T. Chen, M.-J. Xie, S.-N. Liu, H.-H. Chen, C.-H. Tang, J.-W. Lee, W.-H. Tu, K.-S. Li, M.-C. Chen, M.-H. Liao, C.-Y. Chang, C.-H. Cheng, S. T. Chang, and C. W. Liu, “Experimental Demonstration of Negative Capacitance epi-Ge/Si FETs with Ferroelectric Hf-based Oxide Gate Stack for Swing Sub-60mV/dec and Hysteresis-Free, ” International Conference on Solid State Devices and Materials (SSDM), pp. 15-16, Tsukuba, Japan, Sep. 26-29, 2016.
  43. Hsu, S.-M. Li, Y.-S. Tu, M.-S. He, J.-C. Chiu, I.-C. Chen, P.-G. Lee, M.-H. Chen, J.-Z. Cheng, I.-C.Enhancement of gate-bias and current stress stability of P-type SnO thin-film transistors with SiNx/HfO2 passivation layers
  44. P.-Y. Chien, M. Zhang, S.-C. Huang, M.-H. Lee, H.-R. Hsu, Y.-T. Ho, Y.-C. Chu, C.-A. Jong*, J. Woo, “Reliable doping technique for WSe2 by W:Ta co-sputtering process, ” 21st IEEE Silicon Nanoelectronics Workshop, SNW 2016, pp. 58-59, Honolulu, Hawaii, Jun. 12-13, 2016.
  45. M.-H. Lee*, S.-T. Chang, and S. Liu, “Strained Ge Metal Insulator Semiconductor Field Effect Transistor with Ge Thin Film, ” International Conference on Metallurgical Coatings and Thin Films (ICMCTF), GP-9, San Diego, California, Apr. 25-29, 2016.
  46. Y.-C. Chiu, C.-Y. Chang*, S.-S. Yen, C.-C. Fan, H.-H. Hsu, C.-H. Cheng*, P.-C. Chen, P.-W. Chen, G.-L. Liou, M.-H. Lee, C. Liu, and W.-C. Chou, “On the Variability of Threshold Voltage Window in Gate-Injection Versatile Memories with Sub-60mV/dec Subthreshold Swing and 1012-Cycling Endurance, ” 2016 IEEE International Reliability Physics Symposium (IRPS 2016), MY.7.1-7.5, Pasadena, California, Apr. 17-21, 2016.
  47. Lee, M.H. Chen, P.-G. Liu, C. Chu, K.-Y. Cheng, C.-C. Xie, M.-J. Liu, S.-N. Lee, J.-W. Huang, S.-J. Liao, M.-H. Tang, M. Li, K.-S. Chen, M.-CProspects for ferroelectric HfZrOx FETs with experimentally CET=0.98nm, SSfor=42mV/dec, SSrev=28mV/dec, switch-off <0.2V, and hysteresis-free strategies.
  48. K. S. Li*, P.-G. Chen, T. Y. Lai, C. H. Lin, C.-C. Cheng, C. C. Chen, M.-H. Liao, M. H. Lee, M. C. Chen, J. M. Sheih, W. K. Yeh, F. L. Yang, Sayeef Salahuddin, Chenming Hu, “Sub-60mV-Swing Negative-Capacitance FinFET without Hysteresis, ” Technical Digest, International Electron Device Meeting (IEDM), Washington D.C., pp. 620-623, Dec. 7-9, 2015.IEDM, Washington D.C., Dec. 7-9, 2015.
  49. C.-C. Cheng, C. Liu, P.-G. Chen, K.-Y. Chu, M.-J. Xie, S.-N. Liu, J.-W. Lee, S.-J. Huang, M.-H. Liao, and M. H. Lee*, “Self-Aligned Fin-Shaped Tunnel FET without Space between Gate and Source/Drain and using i-line Photolithograph, ” 2015 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES – SCIENCE AND TECHNOLOGY - (IWDTF 2015), pp. 17-18, Miraikan, National Museum of Emerging Science and Innovation, Tokyo, Japan, Nov. 2-4, 2015.
  50. C. Liu, P.-G. Chen, C.-C. Cheng, K.-Y. Chu, M.-J. Xie, S.-N. Liu, J.-W. Lee, S.-J. Huang, M.-H. Liao, and M. H. Lee*, “Sub-0.2V Switching Voltage of Negative Capacitance Double Gate Tunnel FET Using Ferroelectric Gate, ” International Conference on Solid State Devices and Materials (SSDM), pp. 16-17, Sapporo, Japan, Sep. 27-30, 2015.
  51. M.-J. Xie, S.-J. Huang, J.-W. Lee, S.-N. Liu, Y.-J. Lee, C.-A. Jong, S. T. Chang, and M. H. Lee*, “Addressability Few-layer MoS2 Flakes with Transferable, Alignable, and Exfoliative, ” 21st International Conference on Electronic Properties of Two-Dimensional Systems (EP2DS-21), p. 432, Sendai, Japan, 26-31, July, 2015.
  52. M.-T. Wu, K.-T. Chen, M.-H. Lee*, and Shu-Tong Chang*, “Tight-binding Calculation for Monolayer MoS2, ” 21st International Conference on Electronic Properties of Two-Dimensional Systems (EP2DS-21), p. 287, Sendai, Japan, 26-31, July, 2015.
  53. Y.-C. Chiu, C.-H. Cheng*, C.-C. Fan, P.-C. Chen, C.-Y. Chang, M.-H. Lee, C. Liu, S.-S. Yen, H.-H. Hsu, “Interface polarization fluctuation effect of ferroelectric hafnium-zirconium-oxide ferroelectric memory with nearly ideal subthreshold slope, ” 73th Device Research Conference (DRC), pp. 41-42, Ohio State University, OH, 21-24, June, 2015.
  54. Y.-C. Chiu, C.-H. Cheng*, C.-Y. Chang, M.-H. Lee, H.-H. Hsu and S.-S. Yen, “Low Power 1T DRAM/NVM Versatile Memory Featuring Steep Sub-60-mV/decade Operation, Fast 20-ns Speed, and Robust 85oC-Extrapolated 1016 Endurance, ” Symposia on VLSI Technology and Circuits, pp. T184-T185, Kyoto, Japan, 15-19, June, 2015.
  55. Y.-C. Chiu, C.-Y. Chang, H.-H. Hsu, C.-H. Cheng*, M.-H. Lee, “Impact of Nanoscale Polarization Relaxation on Endurance Reliability of One-Transistor Hybrid Memory Using Combined Storage Mechanisms, ” 2015 IEEE International Reliability Physics Symposium (IRPS 2015), MY.3.1-3.5, Monterey, California, Apr. 19-23, 2015.
  56. M. H. Lee*, S.-M. Hsu, C. Liu, and J.-D. Shen, “Structure Design of IGZO TFTs with Stress Analysis for Flexible Applications using Finite Element Method, ” The 21th International Display Workshops (IDW’14), pp.1479-1482, Niigata, Japan, Dec. 3-5, 2014
  57. M. H. Lee*, Z. Y. Chen, and J.-D. Liu, “Development of HIT (Hetero-junction with Intrinsic Thin Layer) Solar Cells with Amorphous Layers by Electron Beam Evaporator Deposition, ” IEEE International NanoElectronics Conference (IEEE INEC 2014), p. 15, Hokkaido, Japan, Jal. 28-31, 2014.
  58. M. H. Lee*, J.-C. Lin, Y.-T. Wei, C.-Y. Kao, C.-W. Chen, W.-H. Tu, and M. Tang, “Steep Subthreshold Slope FETs, ” Symposium on Nano Device Technology (SNDT), S3-3, p. 14, Hsinchu Taiwan, 2014. (invited)
  59. J.-D. Liu, C.-H. Chen, Y.-T. Wei, H.-K. Zhuang, S.-H. Huang, K.-Y. Chu, C.-C. Cheng, C. Liu, P.-G. Chen, and M. H. Lee*, “Efficiency Enhancement in Heterojunction with Intrinsic Thin layer (HIT) Solar Cells with Ferroelectric Layer, ” Symposium on Nano Device Technology (SNDT), Hsinchu Taiwan, 2014.
  60. M. H. Lee*, J.-C. Lin, Y.-T. Wei, C.-W. Chen, W.-H. Tu, H.-K. Zhuang, and M. Tang, “Ferroelectric Negative Capacitance Hetero-Tunnel Field-Effect-Transistors with Internal Voltage Amplification, ” Technical Digest, International Electron Device Meeting (IEDM), pp. 104-107, Washington D.C., Dec. 9-11, 2013.
  61. M. H. Lee*, J.-D. Luo, J.-S. Huang, Y.-L. Chueh, C.-W. Chen, T.-Y. Wu, Y.-S. Chen, H. Y. Lee, F. Chen, and M.-J. Tsai, “Non-linear Bi-directional Selector without Rare Materials for Stackable Cross-bar Bipolar Memory Applications, ” 2013 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ELECTRON DEVICES – SCIENCE AND TECHNOLOGY - (IWDTF 2013), pp. 63-64, University of Tsukuba (Tokyo Campus), Tokyo, Japan, Nov. 7-9, 2013.
  62. P.-G. Chen, M. H. Lee*, C. Y. Tsai, and A. Chin, “Quaternary InAlGaN-Barrier GaN MOS-HEMT with Enhancement-Mode Operation, ” 6th Int. Symp. on Control of Semiconductor Interfaces (ISCSI-VI), pp. 337-338, Fukuoka, Japan, Jun. 2-6, 2013.
  63. M. H. Lee*, “Analysis of Si:C on Relaxed SiGe by Reciprocal Space Mapping (RSM) for NMOSFETs Applications, ” 5th IEEE International Nanoelectronics Conference (INEC), p. 44, Singapore, Jan. 2-4, 2013.
  64. Z.-Y. Chen, Y.-Y. Chen, J.-C. Lin, J.-D. Luo, M.-H. Cheng, Y.-T. Wei, H.-K. Zhuang, S.-H. Huang, and M. H. Lee*, “Development of HIT (Hetero-junction with Intrinsic Thin Layer) Solar Cells with Amorphous Layers by Electron Beam Evaporator Deposition, ” Optics and Photonics Taiwan, International Conference (OPTIC), PI-SA-II-(1)-5, Taipei, Taiwan, Dec. 6-8, 2012.
  65. M. H. Lee*, J.-C. Lin, C.-Y. Kao, C.-W. Chen, J.-D. Luo, Y.-J. Lee, and G.-L. Luo, “Current Enhancement of Green Transistors as Compare to Conventional Tunnel FETs with Dopant Segregated Process, ” 2012 International Conference on Solid State Devices and Materials (SSDM), pp. 66-67, Kyoto, Japan, Sep. 25-27, 2012.
  66. J.-C. Lin, C.-Y. Kao, C.-W. Chen, C.-T. Shen, C.-L. Yang, Z.-Y. Chen, J.-D. Luo, M.-H. Cheng, P.-G. Chen, G.-L. Luo, Y.-J. Lee, and M. H. Lee*, “Current Enhancement of Band-to-Band Tunneling (BTBT) Mechanism Transistors with Dopant Segregated Schottky Barrier (DSS) Process, ” Symposium on Nano Device Technology (SNDT), Hsinchu Taiwan, 2012.
  67. T. –H. Wu, and M. H. Lee*, “The Fabrication of Poly-Si MOSFETs using Ultra-Thin High-K/Metal-Gate Stack for Monolithic 3D Integrated Circuits Technology Applications, ” International Semiconductor Device Research Symposium (ISDRS), TA5-04, Washington D.C., 7-9 Dec., 2011.
  68. M. H. Lee*, T.-H. Wu, and S.-C. Weng, “P-type Tunneling Transistors with Poly-Si by Sequential Lateral Solidification (SLS) Growth Technique” 2011 International Conference on Solid State Devices and Materials (SSDM), pp. 354-355, Nagoya, Japan, Sep. 28-30, 2011.
  69. 14. M. H. Lee*, B.-F. Hsieh, P.-G. Chen, S. T. Chang, and S. W. Lee, “Nickel Schottky Junction on epi-Ge/Si for Metal Source/Drain in Strained Ge MOSFETs Application, ” 7th International Conference on Silicon Expitaxy and Heterostructures (ICSI-7), abstract number:1160, Leuven, Belgium, Aug. 28- Sep. 1, 2011.
  70. M. H. Lee*, C.-Y. Kao, C.-L. Yang, Y.-S. Chen, H. Y. Lee, F. Chen, and M.-J. Tsai, “Reliability of Ambipolar Switching Poly-Si Diodes for Cross-Point Memory Applications, ” 69th Device Research Conference (DRC), pp. 89-90, Santa Barbara, CA, 22-24, June, 2011.
  71. M. H. Lee*, C.-Y. Kao, C.-L. Yang, and C.-H. Lee, “P-type Tunneling FET on Si (110) Substrate with Anisotropic Effect, ” 69th Device Research Conference (DRC), pp. 207-208, Santa Barbara, CA, 22-24, June, 2011.
  72. M. H. Lee*, S. T. Chang, C.-W. Tai, J.-D. Shen, and C.-C. Lee, “Heterojunction with Intrinsic Thin Layer (HIT) Solar Cell under Mechanical Bending, ” 37th IEEE Photovoltaic Specialists Conference (PVSC), Seattle, Washington, 19-24, June, 2011.
  73. C.-Y. Kao, M. H. Lee*, W.-N. Tseng, C.-H. Lee, and G.-L. Luo, “The Anisotropic Effect in P-type Tunneling FET on Si (110) Substrate, ” Symposium on Nano Device Technology (SNDT), Hsinchu Taiwan, 2011. (奈米電子頭等獎
  74. I-Chung Chiu,Jung-Jie Huang, Yung-Pei Chen, I-Chun Cheng*, Jian Z. Chen*, M.H. Lee “The instabiltiy mechanism of nc-Si thin film transistors induced by the dual stress of mechanical bending stress and dc electrical stress, ” International Display Manufacturing Conference (IDMC’11), S 15-03, Taipei, Taiwan, 18-21, Apr., 2011.
  75. M. H. Lee*, C.-W. Tai, J.-J. Huang, S. T. Chang, D.-H. Wu, C.-Y. Kao, H. C. Cheng, and C.-C. Lee, “Gap State Density of Bottom Gate Micro-crystalline TFTs with Bias Stress for Flexible Display Applications, ” International Display Manufacturing Conference (IDMC’11), PS-058, Taipei, Taiwan, 18-21, Apr., 2011.
  76. B.-F. Hsieh, S. T. Chang*, and M. H. Lee, “Uniaxial Stress Effect and Hole Mobility in Strained SiGe PMOSFETs, ” 2011 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (IWDTF 2011), pp. 87-88, Tokyo, Japan, 20-21, Jan., 2011.
  77. M. H. Lee*, B.-F. Hsieh, C.-H. Lee, and S. T. Chang, “The Substrate Orientation Effect of P-type Tunneling Field Effect Transistors on Si (100) and (110) Wafers, ” 2011 International Workshop on Dielectric Thin Films for Future Electron Devices: Science and Technology (IWDTF 2011), pp. 93-94, Tokyo, Japan, 20-21, Jan., 2011.
  78. B.-F. Hsieh, T.-C. Kuo, A.-C. Chen, T.-H. Cheng, C.-Y. Chen, S. T. Chang, and M. H. Lee*, “Heat Treatment of Thin Film Solar Cell on SnO2:F (FTO), ” International Electron Devices and Materials Symposium (IEDMS), P-A-6, Jhongli, Taiwan, 18-19, Nov., 2010.
  79. C.-W. Tai, C.-Y. Liu, S. T. Chang, and M. H. Lee*, “Strain Distribution and Electrical Characteristics of Heterojunction with Intrinsic Thin Layer (HIT) Solar Cell under Mechanical Stress, ” International Electron Devices and Materials Symposium (IEDMS), P-A-5, Jhongli, Taiwan, 18-19, Nov., 2010.
  80. C.-W. Tai, C.-Y. Liu, S. T. Chang, and M. H. Lee*, “Strain Distribution and Electrical Characteristics of Heterojunction with Intrinsic Thin Layer (HIT) Solar Cell under Mechanical Stress, ” International Electron Devices and Materials Symposium (IEDMS), P-A-5, Jhongli, Taiwan, 18-19, Nov., 2010.
  81. C.-W. Tai, M. H. Lee*, S. T. Chang, H. C. Cheng, J.-J. Huang, and C.-C. Lee, “The Modeling of Micro-Crystalline Silicon Bottom Gate TFTs on Flexible Substrate with Gap State Distribution, ” The International Conference on Flexible and Printed Electronics (ICFPE), S9-1-2, Hsinchu, Taiwan, 28-29 Oct., 2010.
  82. M. H. Lee*, C.-H. Lee, S. W. Lee, S. T. Chang, and B.-F. Hsieh, “Improvement of Interface Trap Density in Ni/Si0.2Ge0.8 Schottky Diodes by Laser Annealing, ” 5th International SiGe Technology and Device Meeting (ISTDM), 1917304, Stockholm, Swden, 24-26 May, 2010.
  83. M. H. Lee*, S. T. Chang, M. Tang, J.-J. Huang, K.-Y. Ho, Y.-S. Huang, and C. C. Lee, “Redistributed Deep States Created by Mechanical Bending to Improve the Electrical Reliability of a-Si:H TFTs on Flexible Substrates, ” SID (Society for Information Display) International Symposium, Seminar, and Exhibition, pp. 1636-1639, Seattle, WA, USA, May 23 - May 28, 2010.
  84. W.-N. Tseng, C.-H. Lee, S.-H. Lu, J.-Y. Liu, A.-C. Chen, G.-L. Luo, and M. H. Lee*, “The Characteristics and Fabrication of P-type Tunneling Field Effect Transistors on (100) and (110) Orientation, ” Symposium on Nano Device Technology (SNDT), Hsinchu Taiwan, 2010. (傑出學生論文優選獎)
  85. M. H. Lee*, S. T. Chang, J.-J. Huang, G.-R. Hu, Y.-S. Huang, and C.-C. Lee, “Analysis and Modeling of Nano-Crystalline Silicon TFTs on Flexible Substrate with Mechanical Strain” IEEE International NanoElectronics Conference (IEEE INEC 2010), p. 58, Hong Kong, China, Jan. 3-8, 2010.
  86. M. H. Lee*, K.-J. Chen, S.-C. Weng, W.-H. Liu, M.-J. Yang, C.-T. Shih, L.-S. Lee, and M.-J. Kao, “High Performance High-K Metal-Gate Poly-Si TFTs with Subthreshold Swing < 200 mV/dec for Monolithic 3D Integrated Circuits Applications, ” 2009 International Conference on Solid State Devices and Materials (SSDM), pp. 1036-1037, Sendai, Japan, Oct. 7-9, 2009.
  87. M. H. Lee*, S. T. Chang, J.-J. Huang, G.-R. Hu, C.-H. Lee, Y.-Y. Chen, S. W. Lee, S.-C. Weng, K.-J. Chen, and W.-H. Liu, “The Gap State Density of Micro/Nano-Crystalline Silicon Active Layer on Flexible Substrate, ” 6th International Conference on Silicon Expitaxy and Heterostructures (ICSI-6), pp. 122-123, Los Angeles, California, May 17-22, 2009.
  88. S.-C. Weng, H. T. Chen, G.-R. Hu, W.-H. Liu, K.-J. Chen, G.-L. Luo, and M. H. Lee*, “The Superior Reliability of Self-Heating Effect in Tunneling-pTFTs as Compare with Classical pTFTs” Symposium on Nano Device Technology (SNDT), Hsinchu Taiwan, 2009.
  89. M. H. Lee*, S. T. Chang, S.-C. Weng, W.-H. Liu, K.-J. Chen, K.-Y. Ho, M. H. Liao, J.-J. Huang, and G.-R. Hu, “The Correlation Between Trap States and Mechanical Reliability of Amorphous Si:H TFTs for Flexible Electronics, ” 2009 IEEE International Reliability Physics Symposium (IRPS 2009), pp. 956-959, Montreal, Canada, Apr. 26-30, 2009.
  90. S.-C. Weng, W.-H. Liu, K.-J. Chen, K.-W. Shen, S. W. Lee, and M. H. Lee*, “The Improvement of Interface State Density on Ni/n-Si0.2Ge0.8 Schottky Diodes by Laser Annealing for Source/Drain Applications, ” 2008 International Electron Devices and Materials Symposia, Taichung, Taiwan, Nov. 28-29, 2008.
  91. M. H. Lee*, S. T. Chang, M. Tang, K.-Y. Ho, J.-J. Huang, and G.-R. Hu, “The Trap States Formation of Amorphous Si TFT with Mechanical Bending for Flexible Electronics,” 2008 International Electron Devices and Materials Symposia, Taichung, Taiwan, Nov. 28-29, 2008.
  92. Y.-T. Liu, M. H. Lee*, H. T. Chen, C.-F. Huang, C.-Y. Peng, L.-S. Lee, and M.-J. Kao, “Thermal Accumulation Improvement for Fabrication Manufacturing of Monolithic 3D Integrated Circuits,” The 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT 2008), E3.8 , Beijing, China, 20-23, Oct. 2008.
  93. M. H. Lee*, H. T. Chen, C.-H. Lee, G.-L. Luo, J. Shieh, Y.-T. Liu, R.-S. Syu, and K.-W. Shen, “The Localization Self-Assembled Ge Islands by Excimer Laser Annealing without Prepatterned, ” 15th Symposium on Nano Device Technology (SNDT), Hsinchu Taiwan, 2008. (功能性奈米材料技術學生論文優選獎)
  94. M. H. Lee*, H. T. Chen, C.-H. Lee, G.-L. Luo, J. Shieh, S. W. Lee, Y.-T. Liu, R.-S. Syu, and K.-W. Shen, “The Studies of Self-Assembled Ge Islands Produced by Excimer Laser Annealing, ” 4rd International SiGe Technology and Device Meeting (ISTDM), pp. 167-168 Hsinchu, Taiwan , 11-14 May, 2008.
  95. M. H. Lee* (李敏鴻*), S. T. Chang (張書通), K.-W. Shen (沈坤葦), R-S. Syu (徐睿翔), and Y.-T. Liu, “The dangling bonds formation with strain in hydrogenated amorphous silicon on flexible substrate, ” Annual Meeting of The Physical Society of Republic of China, 28-30 Jan., 2008, Hsinchu, Taiwan.
  96. Y.-T. Liu, S. T. Chang, R.-S. Syu, K.-W. Shen and M. H. Lee*, “The Thermal Accumulated Improvement of a-Si:H Flexible Electronics for AMOLED Application, ” IEEE International Conference on Electron Devices and Solid-State Circuit (EDSSC), vol. I, pp. 523-526, Tainan, Taiwan, 20-22 Dec., 2007.
  97. M. H. Lee*, S. T. Chang, C.-F. Huang, S. Maikap, K.-W. Shen, R.–S. Syu, and Y.-T. Liu “Strained-Si:C-Source/Drain NMOSFETs for Channel Strain Enhancement, ” International Semiconductor Device Research Symposium (ISDRS), pp. 1-2, Washington D.C., 12-14 Dec., 2007. (Nominated for the Best Student Award)
  98. M. H. Lee*, S. T. Chang, Y.-T. Liu, C.-F. Huang, K.-Y. Ho, P.-C. Chen, R.–S. Syu, and K.-W. Shen, “The Operation of a-Si:H TFTs Flexible Electronics on Plastic Substrate, ” International Semiconductor Device Research Symposium (ISDRS), pp. 1-2, Washington D.C., 12-14 Dec., 2007.
  99. Y.-T. Liu, S. T. Chang, R.-S. Syu, K.-W. Shen and M. H. Lee*, “THE THERMAL CONTROLWITH DISSIPATION LAYER OF A-SI:H FLEXIBLE ELECTRONICS FOR AMOLED APPLICATION, ” 2007 Optics and Photonics in Taiwan (OPT), 30 Nov.- 1 Dec., 2007, Taichung, Taiwan.
  100. R.-S. Syu, H. T. Chen, Y.-T. Liu, K.-W. Shen, and M. H. Lee*, “THE WAVELENGTH RESPONSIVELY OF p/i/n POLY-SI LATERAL PHOTODIODE, ” 2007 Optics and Photonics in Taiwan (OPT), 30 Nov.- 1 Dec., 2007, Taichung, Taiwan
  101. 沈坤葦，徐睿翔，張書通，劉永宗，李敏鴻*, “應用於應變矽技術之碳摻雜源汲極PN 接面, ” 2007 Optics and Photonics in Taiwan (OPT), 30 Nov.- 1 Dec., 2007, Taichung, Taiwan.
  102. P. S. Chen*, S.W. Lee, M. H. Lee, and C. W. Liu, “Formation of relaxed SiGe on the buffer consists of modified SiGe islands by Si pre-intermixing, ” Fifth International Symposium on Control of Semiconductor Interfaces (ISCSI-V), pp. 119-120, Hachioji, Tokyo, Japan, Nov. 12-14, 2007.
  103. S.W. Lee*, P. S. Chen, M. H. Lee, and C. W. Liu, “Modified growth of Ge quantum dots using C2H4 and SiCH6 mediation by ultra-high vacuum chemical vapor deposition,” Fifth International Symposium on Control of Semiconductor Interfaces (ISCSI-V), pp. 155-156, Hachioji, Tokyo, Japan, Nov. 12-14, 2007.
  104. M. H. Lee*, S. T. Chang, S. Maikap, K.-W. Shen and W.-C. Wang, “Short Channel Effect Improved Strained-Si:C-Source/Drain PMOSFETs, ” Fifth International Symposium on Control of Semiconductor Interfaces (ISCSI-V), pp. 203-204, Hachioji, Tokyo, Japan, Nov. 12-14, 2007.
  105. M. H. Lee*, S. T. Chang, S. W. Lee, P. S. Chen, K.-W. Shen, and W.-C. Wang, “Strained-Si with Carbon Incorporation for MOSFET Source/Drain Engineering, ” Fifth International Symposium on Control of Semiconductor Interfaces (ISCSI-V), pp. 107-108, Hachioji, Tokyo, Japan, Nov. 12-14, 2007.
  106. M. H. Lee*, S. T. Chang, S.-H. Liao, and M.-H. Liao, “Mechanical Bending Cycles of a-Si:H Layer on Plastic Substrate by PECVD for Flexible Display,” The 10th Asia Pacific Physics Conference (APPC10), pp. 109-110, Pohang, Korea, Aug. 21-24, 2007.
  107. Y.-H. Yeh*, C.-C. Cheng, K.-Y. Ho, P.-C. Chen, M. H. Lee, J.-J. Huang, H.-L. Tyan, C.-M. Leu, K.-C. Lee, S.-Y. Fang, T.-H. Chen, and C.-Y. Pan, “7-inch Color VGA flexible TFT LCD on Colorless Polyimide Substrate with 200oC a-Si:H TFTs, ” SID International Symposium, Seminar and Exhibition, pp. 1677-1679, Long Beach, CA, May 20-25, 2007.
  108. S. T. Chang*, and M. H. Lee, “Studying the Impact of Carbon on Device Performance for Strained-Si MOSFETs,” 5th International Conference on Silicon Epitaxy and Heterostrcuture (ICSI-5), pp.133-134, Mareille, French, May 20-25, 2007.
  109. M. H. Lee*, K.-Y. Ho, P.-C. Chen, C.-C. Cheng, S. T. Chang, M. Tang, M. H. Liao, and Y.-H. Yeh, “Promising a-Si:H TFTs with High Mechanical Reliability for Flexible Display, ” International Electron Device Meeting (IEDM), pp. 299-302, San Francisco, Dec. 11-13, 2006.
  110. P.-C. Chen*, K.-Y. Ho, M. H. Lee, C.-C. Cheng, and Y.-H. Yeh, “Novel Design for a-Si:H TFTs with Promising Mechanical Reliability on Flexible Substrate,” The 13th International Display Workshops (IDW), Vol. 2, pp. 723-726, Otsu, Japan, Dec. 6-8, 2006.
  111. M. H. Lee*, K.-Y. Ho, P.-C. Chen, C.-C. Cheng, and Y.-H. Yeh, “The Dependence of Mechanical Strain on a-Si:H TFTs and Metal Connection Fabricated on Flexible Substrate,” 6th International Meeting on Information Display & 5th International Display Manufacturing Conference (IMID/IDMC), pp. 439-442, Daegu, Korea, Aug. 22-25, 2006.
  112. M. H. Lee*, K.-Y. Ho, P.-C. Chen, C.-C. Cheng, C. M. Lai, and Y.-H. Yeh, “The Mechanical Reliability of a-Si:H TFTs on Flexible Substrate,” Active-Matrix Flat panel Displays and Devices (AM-FPD), pp. 223-226, Japan, July 5-7, 2006.
  113. C.-C. Cheng*, K.-Y. Ho, P.-C. Chen, M. H. Lee, L.-T. Wang, H.L. Tyan, C.-M. Leu, Y.-A. Sha, S.-Y. Fan, T.-H. Chen, C.-Y. Pan, and Y.-H. Yeh, “4.1-inch Color QVGA TFT LCD with a-Si:H TFTs on Plastic Substrates, ” Active-Matrix Flat panel Displays and Devices (AM-FPD), pp. 7-10, Japan, July 5-7, 2006.
  114. M. H. Lee*, S. T. Chang, S. Maikap, C.-Y. Yu, M. H. Liao, and C. W. Liu, “The Interface Properties of SiO2/Strained-Si with Carbon Incorporation Surface Channel MOSFETs,” 3rd International SiGe Technology and Device Meeting (ISTDM), Princeton University in Princeton, NJ USA, May 15-17, 2006.
  115. C.-Y. Peng, F. Yuan, M. H. Lee, C.-Y. Yu, S. Maikap, M. H. Liao, S. T. Chang, and C. W. Liu*, “Novel Schottky Barrier Strained Germanium PMOS,” International Semiconductor Device Research Symposium (ISDRS), 7-9 Dec., 2005, Washington D.C..
  116. M. H. Lee, C.-Y. Yu, S. Maikap, P. S. Chen, M. H. Liao, W.-C. Hua, M.-J. Tsai, C. W. Liu*, “Channel Strain Engineering of MOSFETs,” 2005 Taiwan Nano Tech., pp. 357-361, Sep. 21-23, 2005.
  117. C. C. Yeo*, M. H. Lee, C. W. Liu, K. J. Choi, T. W. Lee and B. J. Cho, “Metal Gate/High-K Dielectric Stack on Si Cap/Ultra-Thin Pure Ge epi/Si Substrate, ” IEEE International Electron Devices and Solid State Circuit (EDSSC), pp. 107-110, 2005.
  118. P. S. Chen, M. H. Lee, S. W. Lee, C. W. Liu, and M.-J. Tsai*, “Strained CMOS technology with Ge,” 207th Meeting of Electrochemical Society, Quebec City, Canada, May. 15-20, 2005
  119. S. Maikap, M. H. Liao, F. Yuan, M. H. Lee, C.-F. Huang, S. T. Chang, and C. W. Liu*, “Package-strain-enhanced device and circuit performance,” 50th International Electron Device Meeting (IEDM), pp. 233-236, San Francisco, Dec. 13-15, 2004.
  120. S. T. Chang, M. H. Lee, S. C. Lu, and C. W. Liu*, “Strained Si1-xCx on Field Transistor on SiGe Substrate,” M2 SiGe: Materials, Processing, and Devices Symposium, 206th Meeting of Electrochemical Society, Honolulu, Hawaii, Oct. 3-8, 2004.
  121. P. S. Chen, S. W. Li, M. H. Lee, C.W. Liu* and M.-J. Tsai, “Thin relaxed SiGe buffer for strained Si CMOS,” Semiconductor Manufacturing Technology Workshop, Sep. 9-10, Hsinchu, Taiwan, 2004.
  122. S. W. Lee, P. S. Chen, M. H. Lee, C. W. Liu* and L. J. Chen, “The growth of high-quality SiGe films with an Intermediate Si layer for strained Si nMOSFETs,” 2nd International SiGe Technology and Device Meeting (ISTDM), Frankfurt (Oder), Germany, May 16-19, 2004.
  123. P. S. Chen, S. W. Li, Y. H. Liu, M. H. Lee, M.-J. Tsai and C. W. Liu*, “Ultra-high-vacuum chemical vapor deposition of hetero-epitaxial SiGe:C and SiC thin films on Si(001) with ethylene (C2H4) precursor as carbon source”, 2nd International SiGe Technology and Device Meeting (ISTDM), Frankfurt (Oder), Germany, May 16-19, 2004.
  124. M. H. Lee, P. S. Chen, W.-C. Hua, C.-Y. Yu, Y.-C. Lee, S. Maikap, Y. M. Hsu, C. W. Liu*, S. C. Lu, W.-Y. Hsieh, and M.-J. Tsai, “The Noise Characteristics in Strained-Si MOSFETs,” 2nd International SiGe Technology and Device Meeting (ISTDM), Frankfurt (Oder), Germany, May 16-19, 2004.
  125. W.-C. Hua, M. H. Lee, P. S. Chen, S. Maikap, C. W. Liu* and K. M. Chen, “Comprehensive Flicker Noise Characterization of the Strained-Si NMOSFETs,” 11th Symposium on Nano Device Technology (SNDT), Hsinchu Taiwan, 2004.
  126. M. H. Lee, P. S. Chen, W.-C. Hua, C.-Y. Yu, Y. T. Tseng, S. Maikap, Y. M. Hsu, C. W. Liu*, S. C. Lu, and M.-J. Tsai, “Comprehensive Low-Frequency and RF Noise Characteristics in Strained-Si NMOSFETs,” Technical Digest,International Electron Device Meeting (IEDM), pp. 69-72, 2003.
  127. M. H. Lee, P. S. Chen, Y. T. Tseng, Y. M. Hsu, S. W. Lee, J. –Y. Wei, C. –Y. Yu, and C. W. Liu*, “ Performance enhancement in strained-Si NMOSFETs on SiGe virtual substrate,” Symposium on nano device technology (SNDT), pp. 28-31, Hsinchu, Taiwan , 2003.
  128. F. Yuan, C.-H. Lin, C. -R. Shie, K.-F. Chen, M. H. Lee, and C. W. Liu*, “Nano-Roughness Enhanced Reliability of MOS Tunneling Diodes,” International Conference on Solid State Devices and Materials (SSDM), Nagoya, Japan, Sep. 17-19, 2002.
  129. W. -C. Hua, M. H. Lee, and C. W. Liu, “A Novel Gas Switching Method to Improve the Reliability of Rapid Thermal Oxide,” Electrochemical Society 201st Spring meeting, Philadelphia, PA, USA, May 12-17, 2002.
  130. CheeWee Liu and Min-Hung Lee, “High Ramp-Down Rate Design in Rapid Thermal Process, ” AMTE 2002 (2002 IEEE/ASME International Conference on Advanced Manufacturing Technologies and Education in the 21st Century).
  131. W. –C. Hua, M. H. Lee, and C. W. Liu, “Correlation between roughness and electroluminescence of Metal-Oxide-Silicon Light-Emitting Diodes,” The 5th Nano Engineering and Micro System Technology Workshop(SNDT), Section A3-3, Hsinchu, Taiwan, R.O.C., Dec., 2001.
  132. C.-H. Lin, M. H. Lee, B. -C. Hsu, K. -F. Chen, C. -R. Shie, and C. W. Liu, “Oxide Roughness Enhanced Reliability of MOS Tunneling Diodes,” International Semiconductor Device Research Symposium (ISDRS), 5-7 Dec., 2001, Washington D.C.. 2001 ISDRS Proceedings, pp. 46-49, 2001. (1st place winner of Best Student Paper Award)
  133. C. -H. Lin, M. H. Lee, B. -C. Hsu, and C. W. Liu, “Novel Methods to Incorporate Deuterium in the MOS Structures and Isotope Effects on Soft Breakdown and Interface States,” Int. Solid State Devices and Materials (SSDM), Sep., 2001, Japan. SSDM Proceedings, pp. 422-423, 2001.
  134. C. W. Liu, Y.-H. Liu, M. H. Lee, M.-J. Chen, and C.-F. Lin, “Metal-Oxide-Silicon Light Emitting Diodes Prepared by Rapid Thermal Oxidation,” Rapid Thermal and Other Short-time Processing Technology II, 199th Meeting of Electrochemical Society, Washington D.C., Mar. 25-29, 2001.
  135. C.-F. Lin, M.-J. Chen, M. H. Lee, and C. W. Liu, “Electroluminescence at Si Bandgap from Metal-Oxide-Semiconductor tunneling diodes,” Photonic West, International Society for Optical Engineering (SPIE), San Jose, CA, Jan. 21-26, 2001.
  136. C.-H Lin, M. H. Lee, C. W. Liu, “New Experimental Evidences for the Relation between Si-H/D Bond Desorption and Injected Electron Energy in NMOS Tunneling Diodes,” Symposium on Nano Device Technology 2001, pp. 16-19.(Best Student Paper Award in SNDT 2001)
  137. C.-F. Lin, M.-J. Chen, E. Z. Liang, W. T. Liu, M. H. Lee, and C. W. Liu, “Novel Electroluminescence from Metal-Insulator-Oxide Structures on Si,” Conference on Optoelectronic and Microelectronic Materials and Devices (COMMAD), Melbourne, Australia, Dec. 6-8, 2000.
  138. M. H. Lee and C. W. Liu "A Spike Ramp Design in a Rapid Thermal Processor," Int. Electron Devices and Materials Symposium (IEDMS), pp. 117-120, Taiwan, Dec. 2000.
  139. M. H. Lee and C. W. Liu, "Novel High Ramp-down Rate and Reflector Design in Rapid Thermal Processing," Spring meeting Elecrochemical Society, 14-18 May, 2000, Toronto, Canada. ECS proceedings “RAPID THERMAL AND OTHER SHORT-TIME PROCESSING TECHNOLOGIES”, vol. 2000-9, pp. 437-444, 2000. (教育部補助)
  140. M. H. Lee, Y. D. Tseng, C. W. Liu, and M. Y. Chern, “ The strain relaxation of Si/Si1-x-yGexCy/Si quantum wells grown by RTCVD,” Spring meeting Elecrochemical Society, 2-6 May, 2000, Seattle. ECS proceedings “ADVEANCE IN RAPID THERMAL PROCESSING”, vol. 99-10, pp. 299-306, 1999.
  141. C.-F. Lin, C. W. Liu, M.-J. Chen, M. H. Lee, and I. C. Lin, “ Tunneling Induced Electroluminescence from Metal-Oxide-Semiconductor Structure on Silicon,” Photonic West, 23-28, Jan., 2000, San Jose, Ca. USA.(3953-06). Proceedings of SPIE vol. 3953
  142. C.-F. Lin, C. W. Liu, M-J Chen, M. H. Lee, I. C. Lin, and S-W Chang, "Nano-Thickness of Oxide for Electroluminescence at Si Band Gap Energy from MOS Structures"第二屆奈米材料展望研討會", 中研院物理所, 2000
  143. C. W. Liu, M. H. Lee, C. F. Lin, I. C. Lin, W. T. Liu, and H. H. Lin.” Light emission and detection by metal oxide silicon tunneling diodes,” Technical Digest, International Electron Device Meeting, Washington D. C.,pp749-752, 1999.
  144. C. W. Liu, M. H. Lee, I. C. Lin, W. T. Liu, and W. S. Kuo, “ Metal Oxide Silicon Tunneling Photodetector,” Mat. Res. Soc., Fall Meeting, Boston, 1999. (supported by NSC)
  145. M. H. Lee and C. W. Liu, “The Temperature Uniformity and Measurement of Rapid Thermal Process for Large Diameter Wafer Application” Int. Electron Devices and Materials Symposium (IEDMS), pp. 118-124, Tainan, Dec. 1998
  146. C. W. Liu, M. H. Lee, C. Y. Chao, C. Y. Chen, and C. C. Yang, “The Design of Rapid Thermal Process for Large Diameter Wafer Applications,”1998 Semiconductor Manufacturing Technology Workshop, pp. 61-70, Hsinchu, Taiwan, 1998.
  147. C. W. Liu, M. H. Lee, C. Y. Chao, C. Y. Chen, C. C. Yang, and Y. Chang, “RTP Temperature measurements using Si Grating prepared by Laser Ablation for Large Diameter Wafer Applications.” Rapid Thermal and Integrated Processing VII, Mat. Res. Soc., Proc, 525, pp. 121-126, 1998. (supported by NSC 87-2218-E-002-005)

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